MAX5852ETL+ Maxim Integrated Products, MAX5852ETL+ Datasheet - Page 5

• Manufacturer Part Number: MAX5852ETL+
• Description: IC DAC 8BIT DUAL 165MSPS 40-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX5852ETL+

• Settling Time: 12ns
• Number Of Bits: 8
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -

ELECTRICAL CHARACTERISTICS (continued)
(AV
I
production test. T
FS
Analog Supply Current (Note 2)
Digital Supply Current (Note 2)
Clock Supply Current (Note 2)
Total Standby Current
Total Shutdown Current
Total Power Dissipation (Note 2)
TIMING CHARACTERISTICS (Figure 5, Figure 6)
Propagation Delay
DAC Data to CLK Rise/Fall Setup
Time (Note 4)
DAC Data to CLK Rise/Fall Hold
Time (Note 4)
Control Word to CW Rise Setup
Time
Control Word to CW Rise Hold
Time
CW High Time
CW Low Time
DACEN = 1 to V
(Coming Out of Standby)
DD
= 20mA, output amplitude = 0dB FS, differential output, T
= DV
PARAMETER
DD
= CV
OUT
Dual, 8-Bit, 165Msps, Current-Output DAC
A
< +25°C guaranteed by design and characterization. Typical values are at T
_______________________________________________________________________________________
DD
Stable Time
= 3V, AGND = DGND = CGND = 0, f
SYMBOL
I
STANDBY
I
I
I
I
P
t
AVDD
DVDD
CVDD
SHDN
t
t
t
t
t
CWH
DCS
DCH
CWL
t
STB
CW
TOT
CS
I
I
I
I
I
I
Single-ended clock mode (DCE = 1)
Differential clock mode (DCE = 0)
I
I
Single-ended clock
mode (DCE = 1)
Differential clock
mode (DCE = 0)
Standby
Shutdown
Single-ended clock mode (DCE = 1)
Differential clock mode (DCE = 0)
Single-ended clock mode (DCE = 1)
Differential clock mode (DCE = 0)
FS
FS
FS
FS
FS
FS
AVDD
AVDD
= 20mA, single-ended clock mode
= 20mA, differential clock mode
= 2mA, single-ended clock mode
= 2mA, differential clock mode
= 20mA, single-ended clock mode
= 20mA, differential clock mode
+ I
+ I
DVDD
DVDD
A
+ I
+ I
DAC
CONDITIONS
= T
CVDD
CVDD
MIN
= 165Msps, differential clock, external reference, V
I
I
I
I
to T
FS
FS
FS
FS
= 20mA
= 2mA
= 20mA
= 2mA
MAX
, unless otherwise noted. T
A
= +25°C.)
MIN
-0.5
1.2
2.7
0.8
2.5
2.5
5
5
0.003
TYP
43.2
43.2
13.8
23.7
A
190
219
104
3.1
9.3
74
5
5
6
6
1
1
3
≥ +25°C guaranteed by
MAX
16.5
11.1
209
6.9
3.7
46
REF
UNITS
cycles
Clock
= 1.2V,
mW
mA
mA
mA
mA
µA
ns
ns
ns
ns
ns
ns
µs
5