CS4365-DQZ Cirrus Logic Inc, CS4365-DQZ Datasheet - Page 3
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CS4365-DQZ
Manufacturer Part Number
CS4365-DQZ
Description
IC DAC 6CH 114DB 192KHZ 48-LQFP
Manufacturer
Cirrus Logic Inc
Datasheet
1.CS4365-CQZ.pdf
(52 pages)
Specifications of CS4365-DQZ
Data Interface
Serial
Number Of Bits
24
Number Of Converters
6
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
390mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Resolution (bits)
24bit
Sampling Rate
192kSPS
Input Channel Type
Serial
Supply Voltage Range - Analog
4.75V To 5.25V
Supply Current
56mA
Digital Ic Case Style
QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1779 - EVALUATION BOARD FOR CS4365
Settling Time
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS4365-DQZR
Manufacturer:
CIRRUS
Quantity:
16 000
Company:
Part Number:
CS4365-DQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
DS670F2
7. FILTER PLOTS ..................................................................................................................................... 45
8. PARAMETER DEFINITIONS ................................................................................................................ 49
9. PACKAGE DIMENSIONS ................................................................................................................... 50
10. ORDERING INFORMATION .............................................................................................................. 51
11. REFERENCES .................................................................................................................................... 51
12. REVISION HISTORY ......................................................................................................................... 51
6.3 PCM Control (address 03h) ............................................................................................................ 35
6.4 DSD Control (address 04h) ............................................................................................................ 36
6.5 Filter Control (address 05h) ............................................................................................................ 38
6.6 Invert Control (address 06h) ........................................................................................................... 38
6.7 Group Control (address 07h) .......................................................................................................... 38
6.8 Ramp and Mute (address 08h) ....................................................................................................... 39
6.9 Mute Control (address 09h) ............................................................................................................ 41
6.10 Mixing Control (address 0Ah, 0Dh, 10h, 13h) .............................................................................. 42
6.11 Volume Control (address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h) ............................................................ 43
6.12 PCM Clock Mode (address 16h) .................................................................................................. 44
6.2.3 PCM/DSD Selection (DSD/PCM) .......................................................................................... 35
6.2.4 DAC Pair Disable (DACx_DIS) .............................................................................................. 35
6.2.5 Power Down (PDN) ............................................................................................................... 35
6.3.1 Digital Interface Format (DIF) ................................................................................................ 35
6.3.2 Functional Mode (FM) ........................................................................................................... 36
6.4.1 DSD Mode Digital Interface Format (DSD_DIF) .................................................................... 36
6.4.2 Direct DSD Conversion (DIR_DSD) ...................................................................................... 37
6.4.3 Static DSD Detect (STATIC_DSD) ........................................................................................ 37
6.4.4 Invalid DSD Detect (INVALID_DSD) ..................................................................................... 37
6.4.5 DSD Phase Modulation Mode Select (DSD_PM_MODE) ..................................................... 37
6.4.6 DSD Phase Modulation Mode Enable (DSD_PM_EN) ......................................................... 37
6.5.1 Interpolation Filter Select (FILT_SEL) ................................................................................... 38
6.6.1 Invert Signal Polarity (Inv_xx) ................................................................................................ 38
6.7.1 Mute Pin Control (MUTEC1, MUTEC0) ................................................................................. 38
6.7.2 Channel A Volume = Channel B Volume (Px_A=B) .............................................................. 39
6.7.3 Single Volume Control (SNGLVOL) ...................................................................................... 39
6.8.1 Soft Ramp and Zero Cross CONTROL (SZC) ...................................................................... 39
6.8.2 Soft Volume Ramp-Up after Error (RMP_UP) ....................................................................... 40
6.8.3 Soft Ramp-Down before Filter Mode Change (RMP_DN) ..................................................... 40
6.8.4 PCM Auto-Mute (PAMUTE) .................................................................................................. 40
6.8.5 DSD Auto-Mute (DAMUTE) ................................................................................................... 41
6.8.6 MUTE Polarity and DETECT (MUTEP1:0) ............................................................................ 41
6.9.1 Mute (MUTE_xx) ................................................................................................................... 41
6.10.1 De-Emphasis Control (PX_DEM1:0) ................................................................................... 42
6.10.2 ATAPI Channel Mixing and Muting (ATAPI) ........................................................................ 42
6.11.1 Digital Volume Control (xx_VOL7:0) ................................................................................... 43
6.12.1 Master Clock DIVIDE by 2 ENABLE (MCLKDIV) ................................................................ 44
CS4365
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