CS4382A-DQZ Cirrus Logic Inc, CS4382A-DQZ Datasheet - Page 38
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CS4382A-DQZ
Manufacturer Part Number
CS4382A-DQZ
Description
IC DAC 8CH 114DB 192KHZ 48-LQFP
Manufacturer
Cirrus Logic Inc
Datasheet
1.CS4382A-CQZ.pdf
(50 pages)
Specifications of CS4382A-DQZ
Data Interface
Serial
Number Of Bits
24
Number Of Converters
8
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
680mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Resolution (bits)
24bit
Sampling Rate
192kSPS
Input Channel Type
Serial
Supply Voltage Range - Analog
4.75V To 5.25V
Supply Current
84mA
Digital Ic Case Style
QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1524 - BOARD EVAL FOR CS4382A DAC
Settling Time
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS4382A-DQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Company:
Part Number:
CS4382A-DQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
38
6.5
6.5.1
6.6
6.6.1
Px_A=B
INV_B4
7
0
7
0
Invert Control (Address 05h)
Mixing Control Pair 1 (Channels A1 & B1)(Address 06h)
Mixing Control Pair 2 (Channels A2 & B2)(Address 09h)
Mixing Control Pair 3 (Channels A3 & B3)(Address 0Ch)
Mixing Control Pair 4 (Channels A4 & B4)(Address 0Fh)
from mute to the original volume value after a filter-mode change according to the settings of the Soft and
Zero Cross bits in the Mode Control 3 register. When disabled, an immediate mute and unmute is per-
formed.
Loss of clocks or a change in the FM bits will always cause an immediate mute; unmute in these condi-
tions is affected by the RMP_UP bit.
Note:
Invert Signal Polarity (Inv_Xx)
Default = 0
0 - Disabled
1 - Enabled
Function:
When enabled, these bits will invert the signal polarity of their respective channels.
Channel A Volume = Channel B Volume (A=B)
Default = 0
0 - Disabled
1 - Enabled
Function:
The AOUTAx and AOUTBx volume levels are independently controlled by the A and the B Channel Vol-
ume Control Bytes when this function is disabled. The volume on both AOUTAx and AOUTBx are deter-
mined by the A Channel Attenuation and Volume Control Bytes (per A-B pair), and the B Channel Bytes
are ignored when this function is enabled.
PxATAPI4
INV_A4
For best results, it is recommended that this feature be used in conjunction with the RMP_UP bit.
6
0
6
0
PxATAPI3
INV_B3
5
0
5
1
PxATAPI2
INV_A3
4
0
4
0
PxATAPI1
INV_B2
3
0
3
0
PxATAPI0
INV_A2
2
0
2
1
INV_B1
PxFM1
1
0
1
0
CS4382A
INV_A1
PxFM0
DS618F2
0
0
0
0