AD9740ARURL7 Analog Devices Inc, AD9740ARURL7 Datasheet - Page 8

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AD9740ARURL7

Manufacturer Part Number
AD9740ARURL7
Description
IC DAC 10BIT 210MSPS 28-TSSOP
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheet

Specifications of AD9740ARURL7

Rohs Status
RoHS non-compliant
Settling Time
11ns
Number Of Bits
10
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
145mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
For Use With
AD9740ACP-PCBZ - BOARD EVAL FOR AD9740ACP
AD9740
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
SOIC/TSSOP
Pin No.
1
2 to 9
10
11 to 14, 19
15
16
17
18
20
21
22
23
24
25
N/A
26
27
28
N/A
N/A
N/A
N/A
(MSB) DB9
Figure 3. 28-Lead SOIC and TSSOP Pin Configuration
DB8
DB6
DB5
DB4
DB3
DB2
DB0
DB7
DB1
LFCSP
Pin No.
27
28 to 32, 1, 2, 4
5
6 to 9
25
N/A
23
24
19, 22
20
21
N/A
17, 18
16
15
10, 26
3
N/A
12
13
11
14
NC
NC
NC
NC
10
11
12
13
14
1
2
3
4
5
6
7
8
9
NC = NO CONNECT
(Not to Scale)
AD9740
TOP VIEW
Mnemonic
DB9 (MSB)
DB8 to DB1
DB0 (LSB)
NC
SLEEP
REFLO
REFIO
FS ADJ
ACOM
IOUTB
IOUTA
RESERVED
AVDD
MODE
CMODE
DCOM
DVDD
CLOCK
CLK+
CLK−
CLKVDD
CLKCOM
24
18
16
15
28
27
26
25
23
22
21
20
19
17
CLOCK
DVDD
DCOM
MODE
AVDD
RESERVED
IOUTA
IOUTB
ACOM
NC
FS ADJ
REFIO
REFLO
SLEEP
Description
Most Significant Data Bit (MSB).
Data Bits 8 to 1.
Least Significant Data Bit (LSB).
No Internal Connection.
Power-Down Control Input. Active high. Contains active pull-down circuit; it can be
left unterminated if not used.
Reference Ground when Internal 1.2 V Reference Used. Connect to ACOM for both
internal and external reference operation modes.
Reference Input/Output. Serves as reference input when using external reference.
Serves as 1.2 V reference output when using internal reference. Requires 0.1 μF capacitor
to ACOM when using internal reference.
Full-Scale Current Output Adjust.
Analog Common.
Complementary DAC Current Output. Full-scale current when all data bits are 0s.
DAC Current Output. Full-scale current when all data bits are 1s.
Reserved. Do Not Connect to Common or Supply.
Analog Supply Voltage (3.3 V).
Selects Input Data Format. Connect to DCOM for straight binary, DVDD for twos complement.
Clock Mode Selection. Connect to CLKCOM for single-ended clock receiver (drive CLK+
and float CLK–). Connect to CLKVDD for differential receiver. Float for PECL receiver
(terminations on-chip).
Digital Common.
Digital Supply Voltage (3.3 V).
Clock Input. Data latched on positive edge of clock.
Differential Clock Input.
Differential Clock Input.
Clock Supply Voltage (3.3 V).
Clock Common.
Rev. B | Page 8 of 32
DVDD
DB3
DB2
DB1
DB0
NC
NC
NC
Figure 4. 32-Lead LFCSP Pin Configuration
1
2
3
4
5
6
7
8
NC = NO CONNECT
(Not to Scale)
PIN 1
INDICATOR
TOP VIEW
AD9740
24 FS ADJ
23 REFIO
22 ACOM
21 IOUTA
20 IOUTB
19 ACOM
18 AVDD
17 AVDD

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