AD9762AR Analog Devices Inc, AD9762AR Datasheet - Page 18

• Manufacturer Part Number: AD9762AR
• Description: IC DAC 12BIT 125MSPS 28-SOIC
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9762AR

• Rohs Status: RoHS non-compliant
• Settling Time: 35ns
• Number Of Bits: 12
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 160mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Package: 28SOIC W
• Resolution: 12 Bit
• Conversion Rate: 125 MSPS
• Architecture: Segment
• Digital Interface Type: Parallel
• Number Of Outputs Per Chip: 1
• Output Type: Current
• Full Scale Error: 10 %FSR
• Integral Nonlinearity Error: ±4 LSB
• Maximum Settling Time: 0.035(Typ) us
• Number Of Channels: 1
• Interface Type: Parallel
• Single Supply Voltage (typ): 5V
• Dual Supply Voltage (typ): Not RequiredV
• Power Supply Requirement: Analog and Digital
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Package Type: SOIC W
• For Use With: AD9762-EB - BOARD EVAL FOR AD9762
• Lead Free Status / Rohs Status: Not Compliant

AD9762
Figure 57. Baseband QAM Implementation Using Two
AD9762s
It is also possible to generate a QAM signal completely in the
digital domain via a DSP or ASIC, in which case only a single
DAC of sufficient resolution and performance is required to
reconstruct the QAM signal. Also available from several vendors
are Digital ASICs which implement other digital modulation
schemes such as PSK and FSK. This digital implementation has
the benefit of generating perfectly matched I and Q components
in terms of gain and phase, which is essential in maintaining
optimum performance in a communication system. In this
implementation, the reconstruction DAC must be operating at a
sufficiently high clock rate to accommodate the highest specified
QAM carrier frequency. Figure 58 shows a block diagram of
such an implementation using the AD9762.
FREQUENCY
R
CARRIER
R
0.1 F
100
CAL2
2k *
R
R
2k *
Q DATA
CAL1
50
I DATA
SET
SET
12
12
12
Figure 58. Digital QAM Architecture
SIN
CLOCK
REFIO
12
STEL-1177
FS ADJ
STEL-1130
REFIO
FS ADJ
** OHMTEK TOMC1603-50F
NCO
QAM
* OHMTEK ORNA1001F
12
REFLO
REFLO
Q-CHANNEL
COS
AVDD
I-CHANNEL
CLOCK
12
U1
U2
CLOCK
CLOCK
AD9762
IOUTA
IOUTB
IOUTA
IOUTB
50
50 **
R
50 **
R
LOAD
LOAD
50 **
R
50 **
R
LOAD
LOAD
LPF
50
TO
NYQUIST
FILTER
AND MIXER
TO
NYQUIST
FILTER
AND MIXER
TO
MIXER
–18–
AD9762 EVALUATION BOARD
General Description
The AD9762-EB is an evaluation board for the AD9762 12-bit
D/A converter. Careful attention to layout and circuit design
combined with a prototyping area allow the user to easily and
effectively evaluate the AD9762 in any application where high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9762
in various configurations. Possible output configurations include
transformer coupled, resistor terminated, inverting/noninverting
and differential amplifier outputs. The digital inputs are designed
to be driven directly from various word generators, with the
on-board option to add a resistor network for proper load
termination. Provisions are also made to operate the AD9762
with either the internal or external reference, or to exercise
the power-down feature.
Refer to the application note AN-420 “Using the AD9760/
AD9762/AD9764-EB Evaluation Board” for a thorough
description and operating instructions for the AD9762
evaluation board.
REV. B