LTC1754ES6-5 Linear Technology, LTC1754ES6-5 Datasheet - Page 7

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LTC1754ES6-5

Manufacturer Part Number
LTC1754ES6-5
Description
Manufacturer
Linear Technology
Type
Step Upr
Datasheet

Specifications of LTC1754ES6-5

Output Voltage
5V
Output Current
50mA
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Package Type
TSOT-23
Pin Count
6
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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APPLICATIO S I FOR ATIO
range. The capacitor manufacturer’s data sheet should be
consulted to determine what style and value of capacitor
is needed to ensure 0.6 F at all temperatures.
Output Ripple
Low frequency regulation mode ripple exists due to the
hysteresis in the sense comparator and propagation delay
in the charge pump control circuit. The amplitude and
frequency of this ripple are heavily dependent on the load
current, the input voltage and the output capacitor size.
For large V
because the increased strength of the charge pump causes
fast edges that may outpace the regulation circuitry.
Generally the regulation ripple has a sawtooth shape
associated with it.
A high frequency ripple component may also be present
on the output capacitor due to the charge transfer action
of the charge pump. In this case the output can display a
voltage pulse during the charging phase. This pulse
results from the product of the charging current and the
ESR of the output capacitor. It is proportional to the input
voltage, the value of the flying capacitor and the ESR of the
output capacitor.
Typical combined output ripple for the LTC1754-5 with
V
10 F output capacitor. A smaller output capacitor and/or
larger output current load will result in higher ripple due to
higher output voltage slew rates.
There are several ways to reduce output voltage ripple. For
applications requiring higher V
ripple, a larger C
mended. A larger capacitor will reduce both the low and
high frequency ripple due to the lower charging and
discharging slew rates, as well as the lower ESR typically
found with higher value (larger case size) capacitors. A low
ESR ceramic output capacitor will minimize the high
frequency ripple, but will not reduce the low frequency
ripple unless a high capacitance value is used. To reduce
both the low and high frequency ripple, a reasonable
compromise is to use a 10 F to 22 F tantalum capacitor
in parallel with a 1 F to 3.3 F ceramic capacitor on V
An R-C filter may also be used to reduce high frequency
voltage spikes (see Figure 1).
IN
= 3V under maximum load is 65mV
IN
the ripple voltage can become substantial
OUT
U
capacitor (22 F or greater) is recom-
U
IN
or lower peak-to-peak
W
P-P
using a low ESR
U
OUT
.
In low load or high V
flying capacitor may be used to reduce output ripple. A
smaller flying capacitor (0.01 F to 0.47 F) delivers less
charge per clock cycle to the output capacitor resulting in
lower output ripple. However, with a smaller flying capaci-
tor, the maximum available output current will be reduced
along with the efficiency.
Note that when using a larger output capacitor the turn on
time of the device will increase.
Inrush Currents
During normal operation V
sients in the 50mA to 100mA range whenever the charge
pump is enabled. However during start-up, inrush cur-
rents may approach 250mA. For this reason it is important
to minimize the source impedance between the input
supply and the V
result in regulation problems or prevent start-up.
Ultralow Quiescent Current Regulated Supply
The LTC1754 contains an internal resistor divider (refer to
the Simplified Block Diagram) that typically draws 1.5 A
from V
causes a droop rate of only 150mV per second on V
with C
cycle signal to the SHDN pin ensures that the circuit of
Figure 2 comes out of shutdown frequently enough to
maintain regulation. Since the LTC1754 spends nearly the
entire time in shutdown, the no-load quiescent current is
approximately (V
The LTC1754 must be out of shutdown for a minimum
duration of 200 s to allow enough time to sense the output
voltage and keep it in regulation. A 2Hz, 2% duty cycle
OUT
OUT
Figure 1. Output Ripple Reduction Techniques
= 10 F. Applying a 2Hz to 100Hz, 2% to 5% duty
LTC1754-X
LTC1754-X
. During no-load conditions, this internal load
LTC1754-3.3/LTC1754-5
V
V
OUT
OUT
IN
OUT
pin. Too much source impedance may
IN
+
+
)(1.5 A)/( V
applications, smaller values for the
15 F
TANTALUM
10 F
TANTALUM
IN
2
will experience current tran-
+
IN
).
10 F
TANTALUM
1 F
CERAMIC
1754 F01
V
V
OUT
OUT
7
OUT

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