ADP3607AR-5 Analog Devices Inc, ADP3607AR-5 Datasheet - Page 7

• Manufacturer Part Number: ADP3607AR-5
• Manufacturer: Analog Devices Inc
• Type: Step Upr

Specifications of ADP3607AR-5

• Output Voltage: 5V
• Output Current: 50mA
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package Type: SOIC
• Pin Count: 8
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

the output capacitor, C
cycle, peak-to-peak output ripple voltage is calculated by using
the following formula.
where
I
F
C
V
Multiple smaller capacitors can be connected in parallel to yield
lower ESR and potential cost savings. For lighter loads, propor-
tionally smaller capacitors are required. To reduce high frequency
noise, bypass the output with a 0.1 F ceramic capacitor in parallel
with the output capacitor.
Pump Capacitor
The ADP3607 alternately charges C
C
fers charge to C
ing the time C
two times the output current. During the time C
charge to C
A low ESR capacitor has much greater impact on performance
for C
rent. Therefore, the voltage drop due to C
the ESR of C
affects the output ripple voltage, the voltage drop generated by
the ESR of C
put source resistance, determines the maximum available V
Improved Load Regulation
In most applications, IR drops due to printed circuit board
traces are not critical. V
at a convenient pcb location close to the load. However, if a
reduction in IR drops, or improvement in load regulation is
desired, the sense line can be used to monitor the output voltage
at the load. To avoid excessive noise pickup, keep the V
line as short as possible and away from any noisy line.
Shutdown Mode
The ADP3607’s output can be disabled by pulling the SD Pin
to a TTL /CMOS logic high level which will stop the internal
oscillator. Applying a logic low will turn ON the oscillator. If
the shutdown feature is not used, the SD pin should be tied to
ground. The shutdown mode current is dominated by the resis-
tor divider connected to the V
calculated using one of the following formulas.
5 V fixed output version:
Adjustable output version:
where R
REV. 0
L
PUMP
O
P
RIPPLE
= Load Current
= 10 F with an ESR of 0.15
is switched in parallel with the input supply, and then trans-
P
= 250 kHz nominal switching frequency
than C
EXT
2 250
V
O
is in k .
RIPPLE
, the supply current drops down to about 3 mA.
P
P
O
, combined with the voltage drop due to the out-
P
times the load current. While the ESR of C
since current through C
O
is charging, the peak current is approximately
I
50
SENSE SD
kHz
when C
I
mA
SENSE SD
2
(
O
SENSE
10
, during one-half of the charge-pump
F
P
PUMP
(
)
is switched in parallel with C
I
F
L
)
should be connected to the output
( .
SENSE
9 5
(
(
V
2 50
V
C
23 75
IN
IN
O
k
pin. This current can be
.
P
– .
– .
to the input voltage when
2
0 3
mA
0 3
P
k
R
is twice the C
I
V
P
L
EXT
V
0 15
is about four times
)
)
.
ESR
)
P
= 25 mV
is delivering
CO
O
SENSE
O
cur-
. Dur-
O
OUT
.
–7–
Because of the external Schottky diode between V
the output voltage will be held to a diode drop below V
the ADP3607 is in shutdown mode.
Power Dissipation
The power dissipation of the ADP3607 circuit must be limited
such that the junction temperature of the device does not exceed
the maximum junction temperature rating. Total power dissipa-
tion is calculated as follows:
Where I
and V
For example: assuming worst case conditions, V
V
power dissipation is:
This is far below the 660 mW power dissipation capability of the
ADP3607.
General Board Layout Guidelines
Since the ADP3607’s internal switches turn on and off very
quickly, good PC board layout practices are critical to ensure
optimal operation of the device. Improper layouts will result in
poor load regulation, especially with heavy loads. Following
these simple layout guidelines will improve output performance.
1. Use adequate ground and power traces or planes.
2. Use single point ground for device ground and input and
3. Keep external components as close to the device as possible.
4. Use short traces from the input and output capacitors
Maximum Output Voltage
Maximum unregulated output voltage can be obtained by con-
necting the V
Figure 18). Under this condition, the magnitude of the unregu-
lated output voltage depends on the load current. V
inversely proportional to the load current.
OUT
output capacitor grounds.
to the input and output pins respectively.
P
Figure 18. Maximum Unregulated Output Voltage
OUT
= 5 V, I
(2
OUT
7.3
7.1
6.9
6.7
6.5
6.3
6.1
5.9
5.7
5.5
are input and output voltages respectively.
0
and I
5 V – 5 V)(0.05 A) + (5 V)(0.006 A) = 280 mW
V
4.7 F
SENSE
IN
OUT
C
P = (2 V
IN
+
5
S
4.7 F
= 50 mA and I
are output current and supply current, V
C
pin to ground instead of to the V
V
P
10
IN
+
= 3.3V
IN
V
C
C
SD
IN
P
P
15
IN5819
+
–
V
OUTPUT CURRENT – mA
D1
SENSE
– V
V
GND
OUT
OUT
20
S
) I
+
25
V
= 6 mA. Calculated device
IN
OUT
C
4.7 F
O
= 3.6V
V
O
30
+ (V
35
IN
ADP3607
) I
40
IN
S
IN
= 5 V,
OUT
and V
45
OUT
IN
pin (see
50
when
OUT
is
IN
,