MT47H32M8BP-3:B Micron Technology Inc, MT47H32M8BP-3:B Datasheet - Page 110
![](/photos/31/34/313422/mfg557-60-fbga_sml.jpg)
MT47H32M8BP-3:B
Manufacturer Part Number
MT47H32M8BP-3:B
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M8BP-3B.pdf
(128 pages)
Specifications of MT47H32M8BP-3:B
Organization
32Mx8
Density
256Mb
Address Bus
15b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
190mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H32M8BP-3:B
Manufacturer:
MICRON
Quantity:
586
Company:
Part Number:
MT47H32M8BP-3:B TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
- Current page: 110 of 128
- Download datasheet (10Mb)
SELF REFRESH
PDF: 09005aef8117c187
256MbDDR2.pdf - Rev. M 7/09 EN
The SELF REFRESH command is initiated when CKE is LOW. The differential clock
should remain stable and meet
refresh mode. The procedure for exiting self refresh requires a sequence of commands.
First, the differential clock must be stable and meet
prior to CKE going back to HIGH. Once CKE is HIGH (
with three clock registrations), the DDR2 SDRAM must have NOP or DESELECT com-
mands issued for
ments is used to apply NOP or DESELECT commands for 200 clock cycles before
applying any other command.
t
XSNR. A simple algorithm for meeting both refresh and DLL require-
110
t
CKE specifications at least 1 ×
Micron Technology, Inc. reserves the right to change products or specifications without notice.
256Mb: x4, x8, x16 DDR2 SDRAM
t
CK specifications at least 1 ×
t
CKE [MIN] has been satisfied
©2003 Micron Technology, Inc. All rights reserved.
t
CK after entering self
SELF REFRESH
t
CK
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