DAC8248FS Analog Devices Inc, DAC8248FS Datasheet
DAC8248FS
Specifications of DAC8248FS
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DAC8248FS Summary of contents
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FEATURES Two Matched 12-Bit DACs on One Chip 12-Bit Resolution with an 8-Bit Data Bus Direct Interface with 8-Bit Microprocessors Double-Buffered Digital Inputs RESET to Zero Pin 12-Bit Endpoint Linearity ( 1/2 LSB) Over Temperature ...
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DAC8248–SPECIFICATIONS ELECTRICAL CHARACTERlSTICS T = Full Temp Range specified in Absolute Maximum Ratings; unless otherwise noted. Specifications apply for DAC A and DAC B.) A Parameter STATIC ACCURACY Resolution Relative Accuracy Differential Nonlinearity 1 Full-Scale Gain Error Gain Temperature Coefficient ...
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Parameter Symbol Switching Characteristics (Notes 2, 8) LSB/MSB Select to Write Set-Up Time t CBS LSB/MSB Select to Write Hold Time t CBH DAC Select to Write Set-Up Time t AS DAC Select to Write Hold Time t AH LDAC ...
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DAC8248 (continued from page 1) operates on a single supply from + +15 V, and it dissi- pates less than 0 (using zero or V The device is packaged in a space-saving 0.3", 24-pin ...
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Die Size 0.124 0.132 inch, 16,368 sq. mils (3.15 3.55 mm, 10.56 sq. mm) WAFER TEST LIMITS @ + Parameter Symbol Relative Accuracy INL Differential Nonlinearity DNL 1 Full-Scale Gain Error G ...
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DAC8248 –Typical Performance Characteristics Channel-to-Channel Matching (DAC A & B are Superimposed) Nonlinearity vs. V REF Nonlinearity vs. Code (DAC A & B are Superimposed) Differential Nonlinearity vs. V REF Nonlinearity vs. V REF Nonlinearity vs. Code ...
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Full-Scale Gain Error vs. Temperature Supply Current vs. Logic Input Voltage Output Leakage Current vs. Temperature REV. B Logic Input Threshold Voltage vs. Supply Voltage ( Multiplying Mode Frequency Response vs. Digital Code Analog Crosstalk vs. Frequency –7– ...
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DAC8248 Four Cycle Update PARAMETER DEFINITIONS RESOLUTION (N) The resolution of a DAC is the number of states (2 full-scale range (FSR) is divided (or resolved) into; where n is equal to the number of bits. RELATIVE ACCURACY (INL) Relative ...
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Figure 2. N-Channel Current Steering Switch The binary-weighted currents are switched between I AGND by the transistor switches. Selection between I AGND is determined by the digital input code important to keep the voltage difference between I nals ...
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DAC8248 Figure 4. Four Cycle Update Timing Diagram Figure 5. Five Cycle Update Timing Diagram –10– REV. B ...
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AUTOMATIC DATA TRANSFER MODE Data may be transferred automatically from the input register to the DAC register. The first cycle loads the first data byte into the input register; the second cycle loads the second data byte and simultaneously transfers ...
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DAC8248 INTERFACE CONTROL LOGIC PIN FUNCTIONS LSB/MSB – (PIN 17) LEAST SIGNIFICANT BIT (Active Low)/ MOST SIGNIFICANT BIT (Active High). Selects lower 8-bits (LSBs) or upper 4-bits (MSBs); either can be loaded first used with the WR signal ...
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DAC’s digital inputs with 0000 0000 0000 and adjusting the op amp’s offset voltage rec- ommended that the op amp offset voltage be adjusted to less than 10 LSB (244 ...
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DAC8248 ground as shown in Figure 9. The output voltage will be be- tween +5 V and +10 V depending on the digital input code. The output expression is given by (D/4096)(V OUT OS where V = ...
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Figure 10. Single Supply Operation (Voltage Switching Mode) Figure 11. Digitally-Programmable Window Detector (Upper/Lower Limit Detector) MICROPROCESSOR INTERFACE CIRCUITS The DAC8248s versatile loading structure allows direct inter- face to an 8-bit microprocessor. Its simplicity reduces the num- ber of required ...
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Figure 12. DAC8248 to MC6809 Interface 0.200 (5.08) 0.200 (5.08) 0.125 (3.18) 24-Lead Plastic DIP (N-24) 1.275 (32.30) 1.125 (28.60 0.280 (7.11) 0.240 (6.10 PIN 1 0.060 (1.52) 0.210 0.015 (0.38) (5.33) MAX 0.200 (5.05) 0.125 ...