EVAL-ADF4360-3EB1 Analog Devices Inc, EVAL-ADF4360-3EB1 Datasheet - Page 2

• Manufacturer Part Number: EVAL-ADF4360-3EB1
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADF4360-3EB1

• Lead Free Status / Rohs Status: Not Compliant

Hardware Description
The evaluation board comes with a cable for connecting to
the printer port of a PC. The silk screen and cable diagram for
the evaluation board are shown below. The board
schematic is shown on pages 3 and 4.
The board is powered from a single 9V battery.
All components necessary for LO generation are catered
for on-board. A 10MHz TCXO from Fox provides the
necessary Reference Input. Otherwise an External
Reference signal can be connected via SMA1.
The PLL comprises the ADF4360-3 and a passive loop
filter. The VCO outputs are available at RF
a standard SMA connector, plus the complementary VCO
output is available from RF
connector.
If the user wishes they may use their own power supplies
and reference input, they can use the SMA connectors as
shown on the silkscreen and block diagram. Control of the
Chip Enable pin can be achieved by inserting J7, and
removing R12.The on board filter is a Third Order,
Passive Low Pass Filter. This contains three capacitors,
(C13, C14 & C15), plus two resistors (R10 & R11). To
save Board space, The footprint for R10 is located on the
underside of the board. For design of the loop filter, It is
designed for a centre frequency of 1.8GHz, and a channel
spacing of 200kHz. The charge pump current setting is
chosen to be 2.5mA. It's bandwidth is 10kHz.
To design a filter for different setups, Please use
ADIsimPLL.
Figure 1. Evaluation Board Silkscreen
OUT
B complementary
OUT
A through
– 2 –
If the the version of version of ADIsimPLL that you are
using is not configured for the ADF4360-3, then you can
design the loop filter by selecting the ADF4106 as a
synthesizer and inserting all other relevant parameters
from the ADF4360-3 datasheet. Be careful to note that the
charge pump current is half that of the ADF4106.
ADI SimPLL
A copy of ADIsimPLL is also included on the eval kit
CD. This software package designs, simulates and
analyses the entire frequency domain and time domain
response. You can use it to design an appropriate filter for
the PLL. Various passive and active filter architectures are
allowed.
RF OUTPUT STAGES
The output RF stages can be customised to suit the
requirements of the end-user. A tuned load, consisting of a
51nH shunt Inductor for each output (L5 & L6) is
connected to to Vvco. A series 2.7pF coupling capacitor
(C17 & C19) is included plus a series 4.3nH Inductor (L3
& L4) before the RF output to the SMA connector. This
can be changed to optimise tuning to the desired
fundamental frequency.
If in doubt, a 50Ohm resistor can replace the shunt
Inductor, and a zero-ohm link can short out L3 & L4.
EVAL-ADF436X
Female D-Type
6
7
8
9
Evaluation
ADF4360
9 Way
Board
2
4
5
1
3
To
Figure 2. PC Cable Diagram
ADF4360-x CABLE CONNECTIONS
EVAL-ADF4360-3EB1
Brown - DATA
White - GND
Black - CLK
Orange - CE
Red - LE
Yellow
Purple
Blue
REV.PrC 08/03
PC Printer Port
25 Way Male
10
11
12
13
1
2
3
4
5
6
7
8
9
D-Type
To
14
15
16
17
18
19
20
21
22
23
24
25
PC