EVAL-AD7274CB Analog Devices Inc, EVAL-AD7274CB Datasheet - Page 10

• Manufacturer Part Number: EVAL-AD7274CB
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD7274CB

• Lead Free Status / Rohs Status: Not Compliant

AD7273/AD7274
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
MSOP
1
2
3
4
5
6
7
8
Pin No.
TSOT
1
2
7
8
5
6
3
4
Figure 8. 8-Lead MSOP Pin Configuration
SDATA
AGND
V
CS
DD
Mnemonic
V
SDATA
CS
AGND
V
SCLK
DGND
V
DD
REF
IN
1
2
3
4
(Not to Scale)
AD7273/
AD7274
TOP VIEW
Description
Power Supply Input. The V
Data Out. Logic output. The conversion result from the AD7273/AD7274 is provided on this output as a
serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from
the AD7274 consists of two leading zeros followed by the 12 bits of conversion data and two trailing
zeros, provided MSB first. The data stream from the AD7273 consists of two leading zeros followed
by the 10 bits of conversion data and four trailing zeros, provided MSB first.
Chip Select. Active low logic input. This input provides the dual function of initiating conversion on
the AD7273/AD7274 and framing the serial data transfer.
Analog Ground. Ground reference point for all circuitry on the AD7273/AD7274. All analog signals
and any external reference signal should be referred to this AGND voltage.
Voltage Reference Input. This pin becomes the reference voltage input. An external reference should
be applied at this pin. The external reference input range is 1.4 V to V
tied between this pin and AGND.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock
input is also used as the clock source for the conversion process of AD7273/AD7274.
Digital Ground. Ground reference point for all digital circuitry on the AD7273/AD7274. The DGND and
AGND voltages ideally should be at the same potential and must not be more than 0.3 V apart, even
on a transient basis.
Analog Input. Single-ended analog input channel. The input range is 0 to V
8
7
6
5
V
DGND
SCLK
V
IN
REF
Rev. 0 | Page 10 of 28
DD
range for the AD7273/AD7274 is from 2.35 V to 3.6 V.
Figure 9. 8-Lead TSOT Pin Configuration
SDATA
DGND
V
V
DD
IN
1
2
3
4
(Not to Scale)
AD7273/
AD7274
TOP VIEW
DD
. A 10 μF capacitor should be
REF
8
7
6
5
.
AGND
CS
SCLK
V
REF