KU82596CA33 S Z717 Intel, KU82596CA33 S Z717 Datasheet - Page 37

• Manufacturer Part Number: KU82596CA33 S Z717
• Manufacturer: Intel

Specifications of KU82596CA33 S Z717

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

82596CA
The P bit is valid only in the new memory structure modes In 82586 mode this bit is disabled (i e no
prefetched mark)
7
BYTE 1
7
BYTE 2
7
BYTE 3
7
BYTE 4
7
BYTE 5
36
BOF METD
FIFO Limit (Bits 0– 3)
MONITOR
DEFAULT C8h
SAV BF (Bit 7)
DEFAULT 40h
RESUME RD (Bit 1)
ADR LEN (Bits 0 – 2)
NO SCR ADD INS (Bit 3)
PREAM LEN (Bits 4– 5)
LP BCK MODE (Bits 6– 7)
DEFAULT 26h
LIN PRIO (Bits 0 – 2)
EXP PRIO (Bits 4– 6)
BOF METD (Bit 7)
DEFAULT 00h
INTERFRAME SPACING
DEFAULT 60h
SAV BF
LOOP BACK
MONITOR
MODE
(Bits 6– 7)
EXPONENTIAL PRIORITY
1
PREAMBLE LENGTH
X
0
FIFO limit
Receive monitor options If the Byte Count of the configure
command is less than 12 bytes then these Monitor bits are ignored
0 Received bad frames are not saved in the memory
1 Received bad frames are saved in the memory
0
1
Address length (any kind)
No Source Address Insertion
In the 82586 this bit is called AL LOC
Preamble length
Loopback mode
Linear Priority
Exponential Priority
Exponential Backoff method
Interframe spacing
The 82596 does not reread the next CB on the list when a CU Resume
Control Command is issued
The 82596 will reread the next CB on the list when a CU Resume
Control Command is issued This is available only on the 82596B step-
ping
X
0
INTER FRAME SPACING
ADD INS
NO SRC
NOTE
0
0
FIFO LIMIT
ADDRESS LENGTH
LINEAR PRIORITY
0
RESUME RD
0
0
0
0
0
0