FWIXP420ABD Intel, FWIXP420ABD Datasheet - Page 106
FWIXP420ABD
Manufacturer Part Number
FWIXP420ABD
Description
Manufacturer
Intel
Datasheet
1.FWIXP420ABD.pdf
(128 pages)
Specifications of FWIXP420ABD
Core Operating Frequency
533MHz
Package Type
BGA
Pin Count
492
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
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Table 59.
Intel
Datasheet
106
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Motorola* Simplex Mode Values (Sheet 2 of 2)
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Symbol
T
T
T
rdsetup
rdhold
recov
EX_ALE is not valid in simplex mode of operation.
Setting the address phase parameter (T1) will adjust the duration that the address appears to the
external device.
Setting the data setup phase parameter (T2) will adjust the duration that the data appears prior to a
data strobe (read or write) to an external device.
Setting the data strobe phase parameter (T3) will adjust the duration that the data strobe appears
(read or write) to an external device. Data will be available during this time as well.
Setting the data hold strobe phase parameter (T4) will adjust the duration that the chip selects,
address, and data (during a write) will be held.
Setting the recovery phase parameter (T5) will adjust the duration between successive accesses on
the expansion interface.
One cycle is the period of the Expansion Bus clock.
Clock to output delay for all signals will be a maximum of 15 ns for devices requiring operation in
synchronous mode.
Timing tests were performed with a 70-pF capacitor to ground.
Data valid required before the rising edge of
EXP_MOT_DS_N
Data hold required after the rising edge of
EXP_MOT_DS_N
Time required between successive accesses on the
expansion interface.
Intel
®
IXP42X product line and IXC1100 control plane processors—Datasheet
Parameter
Document Number:
Min.
15
0
1
Max.
16
Cycles
Units
ns
ns
252479-007US
June 2007
6
Notes
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