7232ZHSTM4G24TWR-PH0 PNY TECHNOLOGIES, 7232ZHSTM4G24TWR-PH0 Datasheet - Page 5

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7232ZHSTM4G24TWR-PH0

Manufacturer Part Number
7232ZHSTM4G24TWR-PH0
Description
Manufacturer
PNY TECHNOLOGIES
Datasheet

Specifications of 7232ZHSTM4G24TWR-PH0

Lead Free Status / Rohs Status
Supplier Unconfirmed
Simplified Truth Table
(V=Valid, X=Don’t care, H=Logic High, L=Logic Low)
Notes:
Register
Refresh
Bank active & row address
Read &
column
address
Write &
column
address
Burst stop
Pre-charge
Clock Suspend Mode or
active power down
Pre-charge power down
mode
DQM
No operation command
32Mx72 Registered PC-133 DIMM
ds1083-21 Rev 06/22/01
7232ZHSTM4G24TWR-PH0
1.
2.
MRS can be issued only in idle state.
A burst read or write with auto pre-charge cannot be interrupted. New commands can be issued t
Command
Mode Register Set
Auto refresh
Self
Refresh
Auto pre-charge
disable
Auto pre-charge
enable
Auto pre-charge
disable
Auto pre-charge
enable
Bank Selection
All Banks
Entry
Exit
Entry
Exit
Entry
Exit
CKEn-1
H
H
H
H
H
H
H
H
H
H
H
L
L
L
32M x 72 Bit Registered
PC-133 SDRAM DIMM
CKEn
H
H
H
H
X
L
X
X
X
X
X
L
L
X
S*
H
X
X
H
H
L
L
L
L
L
L
L
L
L
L
L
5
RAS*
X
X
H
H
H
H
X
X
X
H
X
V
L
L
L
L
H
CAS*
H
H
H
H
H
X
X
X
X
X
V
L
L
L
L
H
WE*
H
X
H
H
H
X
X
X
H
X
V
L
L
L
L
H
DQM
X
X
X
X
X
X
X
X
X
X
X
X
V
X
PNY Technologies Reserves the right to change products or specifications without notice
BA0,1
RP
V
V
V
V
X
after the end of the burst.
A10/AP
OP Code
H
H
H
L
L
L
Row Address
X
X
X
X
X
X
X
Column addr
Column addr
(A0-A9)
(A0-A9)
A9-A0
A11
X
2000 PNY Technologies, Inc.
Note
1
2
2

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