TMC2249AH5C Fairchild Semiconductor, TMC2249AH5C Datasheet - Page 10

• Manufacturer Part Number: TMC2249AH5C
• Manufacturer: Fairchild Semiconductor

Specifications of TMC2249AH5C

• Function: Digital Mixer
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Package Type: MQFP
• Pin Count: 120
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

PRODUCT SPECIFICATION
Application Notes
The TMC2249A is a flexible signal and image processing building block with numerous user-selectable functions which
expand its usefulness. Table 2 clarifies the operation of the device, demonstrating the various feature available to the user and
the timing delays incurred.
Table 2. TMC2249A Operation Sequence
Digital Filtering
The input structure of the TMC2249A demonstrates great
versatility when all four multiplier inputs and the program-
mable delay registers are utilized.
Table 3 and Table 4 illlustrate how a direct-form symmetric
FIR filter of up to 32 taps can be implemented. By utilizing
Table 3. FIR Filtering with the TMC2249A—Initial Data Loading
10
CLK ADEL A
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Register Position (Hex)
CASEN = 0, H=HIGH, L=LOW, “ms” indicates most significant output word (bits 23-8), “ls” indicates least significant word (bits
15-0). The appropriate enables for the indicated data are assumed, otherwise ‘-’ indicates that port not enabled. Note that the
output data summations including A(8)-D(8) is lost, since the output on cycle 13 is swapped to the LSW of S(12) on cycle 8.
In general, RND may be left high unless the ls output is to be used, as on line 8 above.
0
0
0
0
0
0
0
0
0
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)
A(8)
A(9)
11-0
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
BDEL B
0
0
0
0
0
0
0
0
0
B(1)
B(2)
B(3)
B(4)
B(5)
B(6)
B(7)
B(8)
B(9)
11-0
CDEL C
0
0
0
0
0
0
0
0
0
C(1)
C(2)
C(3)
C(4)
C(5)
C(6)
C(7)
C(8)
C(9)
11-0
DDEL D
Even Data
0
0
0
0
0
0
0
0
0
x(31)
x(29)
x(27)
x(25)
x(23)
x(21)
x(19)
x(17)
x(15)
x(13)
x(11)
x(9)
x(7)
x(5)
x(3)
x(1)
A
D(1)
D(2)
D(3)
D(4)
D(5)
D(6)
D(7)
D(8)
D(9)
11-0
NEG1 NEG2 CAS 15-0 FT ACC RND SWAP
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
CAS(4)
CAS(8)
Odd Data
0
0
0
0
0
0
0
the four input delay registers as pipelined storage banks, the
user can store up to 32 coefficient-data word pairs, split into
alternate "even" and "odd" halves. Two taps of the filter are
calculated on each clock, and the user then increments/decre-
ments the delay words (ADEL-DDEL). The sums of prod-
ucts are successively added to the global sum in the internal
accumulator.
x(30)
x(28)
x(26)
x(24)
x(22)
x(20)
x(18)
x(16)
x(14)
x(12)
x(10)
x(8)
x(6)
x(4)
x(2)
x(0)
C
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
L
H
H
H
H
L
L
L
X
L
Coefficient
H
H
H
H
H
H
H
H
L
h(10)
h(12)
h(14)
h(15)
h(13)
h(11)
h(0)
h(2)
h(4)
h(6)
h(8)
h(9)
h(7)
h(5)
h(3)
h(1)
B
(A(4)
(A(5)
(A(7)
(A(1)
(A(6)
(A(9)
(A(2)
(-A(3)
B(4)+C(4)
B(5)+C(5)
B(7)+C(7)
B(1)+C(1)
B(6)+C(6)
B(8)+C(7)
B(2)-C(2)
B(3)+C(3)
(S(12))
S 15-0
—
—
—
—
—
REV. 1.0.2 7/6/00
D(4)+CAS(4)) ms
D(5)+CAS(8)) ms
Storage
D(7)+S(11)) ms
ls
D(2)+2
h(11)
h(13)
h(15)
h(14)
h(12)
h(10)
D(1)+2
D(6)+2
D(6)+2
h(1)
h(3)
h(5)
h(7)
h(9)
h(8)
h(6)
h(4)
h(2)
h(0)
D(3)) ms
D
TMC2249A
7
7
7
7
) ms
) ms
) ms
) ms