PI74ALVCH162268A Pericom Semiconductor, PI74ALVCH162268A Datasheet

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PI74ALVCH162268A

Manufacturer Part Number
PI74ALVCH162268A
Description
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI74ALVCH162268A

Lead Free Status / Rohs Status
Not Compliant
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Product Features
Logic Block Diagram
PI74ALVCH162268 is designed for low voltage operation
V
Hysteresis on all inputs
Typical V
< 0.8V at V
Typical V
B-port outputs have equivalent 26 series resistors,
no external resistors are required.
Bus Hold retains last active bus state during 3-state
eliminates the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A56)
< 2.0V at V
CC
= 2.3V to 3.6V
06-0138
OLP
OHV
CC
CC
(Output Ground Bounce)
= 3.3V, T
(Output V
= 3.3V, T
A
OH
A
= 25°C
= 25°C
Undershoot)
1
12-Bit To 24-Bit Registered Bus Exchanger
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
This 12-bit to 24-bit registered bus exchanger is designed for 2.3V
to 3.6V V
The PI74ALVCH162268 is used for applications in which data
must be transferred from a narrow high-speed bus to a wide, lower
frequency bus.
The device provides synchronous data exchange between the two
ports. Data is stored in the internal registers on the low-to-high
transition of the clock (CLK) input when the appropriate clock
enable (CLKEN) inputs are low. The select (SEL) line is
synchronous with CLK and selects 1B or 2B input data for the A
outputs.
For data transfer in the A-to-B direction, a two stage pipeline is
provided in the A-to-1B path, with a single storage register in the
A-to-2B path. Proper control of these inputs allows two sequential
12-bit words to be presented synchronously as a 24-bit word on the
B-port. Data flow is controlled by the active-low output enables
(OEA, OEB). These control terminals are registered so bus direction
changes are synchronous with CLK.
The B outputs, which are designed to sink up to 12mA, include
equivalent 26 resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power
down, a clock pulse should be applied as soon as possible and OE
should be tied to V
of the resistor is determined by the current-sinking capability of
the driver. Because OE is being routed through a register, the
active state of the outputs cannot be determined prior to the arrival
of the first clock pulse.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
cc
operation.
CC
through a pullup resistor, the minimum value
PI74ALVCH162268
with 3-State Outputs
PS8352A
07/22/05

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PI74ALVCH162268A Summary of contents

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... PI74ALVCH162268 12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs Product Description Pericom Semiconductor’s PI74ALVCH series of logic circuits are produced in the Company’s advanced 0.5 micron CMOS technology, achieving industry leading speed. This 12-bit to 24-bit registered bus exchanger is designed for 2. ...

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... Operating Characteristics 25° Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 06-0138 12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs ± PI74ALVCH162268 ± PS8352A 07/22/05 ...

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