DS15MB200TSQ/HFLF National Semiconductor, DS15MB200TSQ/HFLF Datasheet - Page 3

• Manufacturer Part Number: DS15MB200TSQ/HFLF
• Manufacturer: National Semiconductor

Specifications of DS15MB200TSQ/HFLF

• Number Of Elements: 3
• Number Of Receivers: 3
• Number Of Drivers: 3
• Input Type: CMOS
• Operating Supply Voltage (typ): 3.3V
• Differential Input High Threshold Voltage: 100mV
• Diff. Input Low Threshold Volt: -100mV
• Output Type: Repeater
• Differential Output Voltage: 500mV
• Transmission Data Rate: 1500Mbps
• Propagation Delay Time: 2.5ns
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

POWER
V
GND
DD
Pin Descriptions
Note 1: For interfacing LVDS outputs to CML or LVPECL compatible inputs, refer to the applications section of this datasheet (planned).
Note 2: Note that the DAP on the backside of the LLP package is the primary GND connection for the device when using the LLP package.
Note 3: The LVDS outputs do not support a multidrop (BLVDS) environment. The LVDS output characteristics of the DS15MB200 device have been optimized for
point-to-point backplane and cable applications.
Connection Diagrams
Name
Pin
LLP Pin
Number
2, 6, 12,
(Note 2)
37, 43,
46, 48
3, 47
I/O, Type
I, Power
I, Power
LLP Top View
DAP = GND
(Continued)
V
Ground reference for LVDS and CMOS circuitry.
For the LLP package, the DAP is used as the primary GND connection to the device. The
DAP is the exposed metal contact at the bottom of the LLP-48 package. It should be
connected to the ground plane with at least 4 vias for optimal AC and thermal performance.
DD
= 3.3V
±
0.3V.
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3
(Refer to pin names for signal polarity)
Description
Directional Signal Paths Top View
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