DS25BR440TSQ National Semiconductor, DS25BR440TSQ Datasheet

DS25BR440TSQ

Manufacturer Part Number
DS25BR440TSQ
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of DS25BR440TSQ

Number Of Elements
4
Number Of Receivers
4
Number Of Drivers
4
Input Type
CMOS
Operating Supply Voltage (typ)
3.3V
Differential Input High Threshold Voltage
100mV
Diff. Input Low Threshold Volt
-100mV
Output Type
Repeater
Differential Output Voltage
450mV
Transmission Data Rate
3125Mbps
Propagation Delay Time
0.6ns
Power Dissipation
2.44W
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS25BR440TSQ/NOPB
Manufacturer:
NSC
Quantity:
2 113
© 2008 National Semiconductor Corporation
DS25BR440
3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis
and Receive Equalization
General Description
The DS25BR440 is a 3.125 Gbps Quad LVDS buffer opti-
mized for high-speed signal routing and repeating over lossy
FR-4 printed circuit board backplanes and balanced cables.
Fully differential signal paths ensure exceptional signal in-
tegrity and noise immunity.
The DS25BR440 features two levels of transmit pre-empha-
sis (PE) and two levels of receive equalization (EQ). Both of
these features compensate for interconnect losses and ulti-
mately maximize noise margin. A loss-of-signal (LOS) circuit
monitors each input channel and a unique LOS pin is asserted
when no signal is detected at that input
Wide input common mode range allows the switch to accept
signals with LVDS, CML and LVPECL levels; the output levels
are LVDS. A very small package footprint requires a minimal
space on the board while the flow-through pinout allows easy
board layout. Each differential input and output is internally
terminated with a 100Ω resistor to lower device return losses,
reduce component count and further minimize board space.
Typical Application
300073
Features
Applications
DC - 3.125 Gbps low jitter, low skew, low power operation
Pin selectable transmit pre-emphasis and receive
equalization eliminate data dependant jitter
Wide input common mode voltage range allows DC-
coupled interface to LVDS, CML and LVPECL drivers
LOS circuitry detects open inputs fault
Integrated 100Ω input and output terminations
8 kV ESD on LVDS I/O pins protects adjoining
components
Small 6 mm x 6 mm LLP-40 space saving package
Clock and data buffering and repeating
Copper cable driving and equalization
FR-4 equalization
OC-48 / STM-16
30007303
February 11, 2008
www.national.com

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DS25BR440TSQ Summary of contents

Page 1

... Each differential input and output is internally terminated with a 100Ω resistor to lower device return losses, reduce component count and further minimize board space. Typical Application © 2008 National Semiconductor Corporation Features ■ 3.125 Gbps low jitter, low skew, low power operation ■ ...

Page 2

... Ordering Code NSID Function DS25BR440TSQ Quad Buffer / Repeater Block Diagram Connection Diagram www.national.com Available Equalization Levels Off / On 30007301 30007302 DS25BR440 Pin Diagram 2 Available Pre-Emphasis Levels Off / On ...

Page 3

Pin Descriptions Pin Name Pin Number IN0+, IN0 IN1+, IN1 IN2+, IN2 IN3+, IN3 OUT0+, OUT0-, 29, 28, OUT1+, OUT1-, 27, 26, OUT2+, OUT2-, 24, 23, OUT3+, OUT3- 22, 21 EQ0, ...

Page 4

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage LVCMOS Input Voltage LVCMOS Output Voltage LVDS Input Voltage LVDS Differential Input Voltage LVDS Output Voltage LVDS Differential Output Voltage ...

Page 5

Symbol Parameter LVDS OUTPUT DC SPECIFICATIONS V Differential Output Voltage OD ΔV Change in Magnitude Output States V Offset Voltage OS ΔV Change in Magnitude Output States I Output Short Circuit Current ...

Page 6

AC Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter LVDS OUTPUT AC SPECIFICATIONS t Differential Propagation Delay Low to PLHD High (Note 11) t Differential Propagation Delay High to PHLD Low (Note 11) t ...

Page 7

Symbol Parameter JITTER PERFORMANCE WITH (Note 11) (Figures Random Jitter (RMS Value) RJ1BD Input Test Channel D t RJ2BD Output Test Channel B (Note 15) t Deterministic Jitter (Peak to Peak) ...

Page 8

DC Test Circuits AC Test Circuits and Timing Diagrams www.national.com FIGURE 1. Differential Driver DC Test Circuit FIGURE 2. Differential Driver AC Test Circuit FIGURE 3. Propagation Delay Timing Diagram FIGURE 4. LVDS Output Transition Times 8 30007320 30007321 30007322 ...

Page 9

Pre-Emphasis and Equalization Test Circuits FIGURE 6. Pre-emphasis Performance Test Circuit FIGURE 7. Equalization Performance Test Circuit FIGURE 5. Jitter Performance Test Circuit 9 30007329 30007327 30007326 www.national.com ...

Page 10

FIGURE 8. Pre-emphasis and Equalization Performance Test Circuit Test Channel Loss Characteristics The test channel was fabricated with Polyclad PCL-FR-370- Laminate/PCL-FRP-370 Prepreg materials (Dielectric con- stant of 3.7 and Loss Tangent of 0.02). The edge coupled differential striplines have the ...

Page 11

Functional Description The DS25BR440 is a 3.125 Gbps Quad LVDS buffer opti- mized for high-speed signal routing and repeating over lossy FR-4 printed circuit board backplanes and balanced cables. The DS25BR440 has a pre-emphasis control pin for each output for ...

Page 12

Input Interfacing The DS25BR440 accepts differential signals and allows sim- ple coupling. With a wide common mode range, the DS25BR440 can be DC-coupled with all common differential Typical LVDS Driver DC-Coupled Interface to an DS25BR440 Input Typical ...

Page 13

Output Interfacing The DS25BR440 outputs signals compliant to the LVDS stan- dard. Its outputs can be DC-coupled to most common differ- ential receivers. The following figure illustrates typical DC- coupled interface to common differential receivers and Typical DS25BR440 Output DC-Coupled ...

Page 14

Typical Performance Total Jitter as a Function of Data Rate Residual Jitter as a Function of Data Rate, FR4 Stripline Length and EQ Level www.national.com 30007350 Residual Jitter as a Function of Data Rate, FR4 Stripline 30007351 Supply Current as ...

Page 15

... Physical Dimensions inches (millimeters) unless otherwise noted (See AN-1187 for PCB Design and Assembly Recommendations) Order Number DS25BR440TSQ NS Package Number SQA40A 15 www.national.com ...

Page 16

... For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers www.national.com/amplifiers Audio www.national.com/audio Clock Conditioners www.national.com/timing Data Converters www.national.com/adc Displays www.national.com/displays Ethernet www.national.com/ethernet Interface www.national.com/interface LVDS www.national.com/lvds Power Management www.national.com/power Switching Regulators www.national.com/switchers LDOs www ...

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