AD9411/PCB Analog Devices Inc, AD9411/PCB Datasheet

AD9411/PCB

Manufacturer Part Number

AD9411/PCB

Description

Manufacturer

Analog Devices Inc

Datasheet

1.AD9411PCB.pdf (28 pages)

Specifications of AD9411/PCB

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FEATURES

SNR = 60 dB @ f

ENOB of 9.8 @ f

SFDR = 80 dBc @ f

Excellent linearity:

LVDS output levels

700 MHz full-power analog bandwidth

On-chip reference and track-and-hold

Power dissipation = 1.25 W typical @ 200 MSPS

1.5 V input voltage range

3.3 V supply operation

Output data format option

Clock duty cycle stabilizer

Pin compatible to LVDS mode AD9430

APPLICATIONS

Wireless and wired broadband communications

Cable reverse path

Communications test equipment

Radar and satellite subsystems

Power amplifier linearization

GENERAL DESCRIPTION

The AD9411 is a 10-bit monolithic sampling analog-to-digital

converter optimized for high performance, low power, and ease

of use. The product operates up to a 200 MSPS conversion rate

and is optimized for outstanding dynamic performance in

wideband carrier and broadband systems. All necessary

functions, including track-and-hold (T/H) and reference, are

included on the chip to provide a complete conversion solution.

The ADC requires a 3.3 V power supply and a differential

sample clock for full performance operation. The digital outputs

are LVDS compatible and support both twos complement and

offset binary format. A data clock output is available to ease

data capture.

Fabricated on an advanced BiCMOS process, the AD9411 is

available in a 100-lead surface-mount plastic package (e-PAD

TQFP-100) specified over the industrial temperature range

(–40°C to +85°C).

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

DNL = ±0.15 LSB (typical)

INL = ±0.25 LSB (typical)

up to 70 MHz @ 200 MSPS (–0.5 dBFS)

up to 70 MHz @ 200 MSPS

up to 70 MHz @ 200 MSPS (–0.5 dBFS)

PRODUCT HIGHLIGHTS

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.326.8703

CLK+

CLK–

VIN+

VIN–

High performance.

Maintains 60 dB SNR @ 200 MSPS with a 70 MHz input.

Low power.

Consumes only 1.25 W @ 200 MSPS.

Ease of use.

LVDS output data and output clock signal allow interface

to current FPGA technology. The on-chip reference and

sample-and-hold function provide flexibility in system

design. Use of a single 3.3 V supply simplifies system

power supply design.

Out-of-range (OR).

The OR output bit indicates when the input signal is

beyond the selected input range.

MANAGEMENT

TRACK

HOLD

FUNCTIONAL BLOCK DIAGRAM

AND

CLOCK

SENSE VREF

REFERENCE

SCALABLE

10-Bit, 170/200 MSPS

PIPELINE

3.3 V A/D Converter

10-BIT

CORE

ADC

AGND DRGND DRVDD AVDD

Figure 1.

LVDS TIMING

AD9411

OUTPUTS

LVDS

www.analog.com

AD9411

DATA,

OVERRANGE

IN LVDS

DCO+

DCO–

AD9411/PCB Summary of contents

Page 1

FEATURES SNR = MHz @ 200 MSPS IN ENOB of 9 MHz @ 200 MSPS (–0.5 dBFS) IN SFDR = 80 dBc @ MHz ...

AD9411 TABLE OF CONTENTS DC Specifications ............................................................................. 3 AC Specifications.............................................................................. 4 Digital Specifications........................................................................ 5 Switching Specifications .................................................................. 6 Explanation of Test Levels ........................................................... 6 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Terminology .................................................................................... 10 ...

Page 3

DC SPECIFICATIONS AVDD = 3.3 V, DRVDD = 3 –40°C, T MIN otherwise noted. Table 1. Parameter RESOLUTION ACCURACY No Missing Codes Offset Error Gain Error Differential Nonlinearity (DNL) Integral Nonlinearity (INL) TEMPERATURE DRIFT Offset Error Gain ...

Page 4

AD9411 1 AC SPECIFICATIONS AVDD = 3.3 V, DRVDD = 3 –40°C, T MIN otherwise noted. Table 2. Parameter SNR Analog Input @ –0.5 dBFS 10 MHz 70 MHz 100 MHz 240 MHz SINAD Analog Input @ ...

Page 5

DIGITAL SPECIFICATIONS AVDD = 3.3 V, DRVDD = 3 –40°C, T MIN Table 3. Parameter CLOCK INPUTS 1 (CLK+, CLK–) 2 Differential Input Voltage 3 Common-Mode Voltage Input Resistance Input Capacitance LOGIC INPUTS (S1, S2, S4, S5) ...

Page 6

AD9411 SWITCHING SPECIFICATIONS AVDD = 3.3 V, DRVDD = 3 –40°C, T MIN Table 4. Parameter (Conditions) 1 Maximum Conversion Rate Minimum Conversion Rate 1 CLK+ Pulse Width High ( CLK+ Pulse Width Low ...

Page 7

ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating AVDD, DRVDD 4 V Analog Inputs –0 AVDD +0.5 V Digital Inputs –0 DRVDD +0.5 V REFIN Inputs –0 AVDD +0.5 V Digital Output Current 20 mA ...

Page 8

AD9411 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS S5 1 DNC 2 AGND 3 AGND 4 AVDD LVDSBIAS 7 AVDD 8 AGND 9 SENSE 10 VREF 11 AGND 12 AGND 13 AVDD 14 AVDD 15 AGND 16 AGND 17 ...

Page 9

Table 6. Pin Function Descriptions Pin No 42–46,49– 12, 13, 16, 17, 20, 23, 25, 26, 30, 31, 32, 35, 38, 41, 86, 87, 91, 92, 93, 96, 97, 100 5, 8, 14, 15, 18, ...

Page 10

AD9411 TERMINOLOGY Analog Bandwidth The analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced by 3 dB. Aperture Delay The delay between the 50% point of the rising edge ...

Page 11

Noise (for Any Range within the ADC) Calculated as follows: − ⎛ × × ⎜ 001 10 dBM V Z NOISE ⎝ where Z is the input impedance the full scale of the device ...

Page 12

AD9411 EQUIVALENT CIRCUITS AVDD 12kΩ 12kΩ CLK+ 150Ω 150Ω 10kΩ 10kΩ Figure 4. Clock Inputs 3.5kΩ 3.5kΩ VIN+ 20kΩ 20kΩ Figure 5. Analog Inputs S1,S5 30kΩ Figure Inputs CLK– 1V DISABLE AVDD VIN– VDD Rev. A ...

Page 13

TYPICAL PERFORMANCE CHARACTERISTICS 0 –10 SNR = 60.1dB SINAD = 59.9dB – –91.3dBc – –75.2dBc SFDR = 75.3dBc –40 –50 –60 –70 –80 –90 –100 –110 –120 MHz Figure 9. ...

Page 14

AD9411 100 90 80 THIRD SFDR SECOND 100 150 200 250 A (MHz) IN Figure 15. Harmonic Distortion (Second and Third) and SFDR vs. AIN Frequency @ 170 MSPS 100 90 SECOND 80 70 ...

Page 15

ANALOG SUPPLY CURRENT 350 300 250 200 OUTPUT SUPPLY CURRENT 150 100 50 0 100 120 140 160 180 ENCODE (MSPS) Figure 21. IAVDD and IDRVDD vs. Clock Rate, 170 MSPS Grade, CLOAD = 5 pF (AIN = ...

Page 16

AD9411 2.0 1.5 1.0 0.5 % GAIN ERROR USING EXT REF 0 –0.5 –1.0 –1.5 –2.0 –50 –30 – TEMPERATURE (°C) Figure 27. Full-Scale Gain Error vs. Temperature (AIN = 10.3 MHz @ –0.5 dBFS, 170/200 MSPS) 60 ...

Page 17

SFDR –dBFS 80dB REFERENCE LINE 30 SFDR –dBc –90 –80 –70 –60 –50 –40 –30 ANALOG INPUT LEVEL (dBFS) Figure 33. SFDR vs. AIN Input Level 10.3 MHz, AIN ...

Page 18

AD9411 APPLICATION NOTES The AD9411 architecture is optimized for high speed and ease of use. The analog inputs drive an integrated high bandwidth track-and-hold circuit that samples the signal prior to quantiza- tion by the 10-bit core. For ease of ...

Page 19

S5 = AVDD VIN+ 768mV 2.8V VIN– = 2.8V Figure 41. Single-Ended Analog Input Range 61 SINAD 2.0 2.2 2.4 2.6 ANALOG INPUT COMMON MODE (V) Figure 42. SINAD Sensitivity to Analog Input Common-Mode Voltage, ...

Page 20

AD9411 SIGNAL GENERATOR REFIN 10MHz REFOUT SIGNAL GENERATOR 3.3V 3. AVDD GND DRVDD GND BAND-PASS FILTER ANALOG J4 AD9411 EVALUATION BOARD CLOCK J5 Figure 44. Evaluation Board Connections Rev Page 3.3V + VDL ...

Page 21

EVALUATION BOARD The AD9411 evaluation board offers an easy way to test the AD9411 in LVDS mode. It requires a clock source, an analog input signal, and a 3.3 V power supply. The clock source is buffered on the board ...

Page 22

AD9411 Table 9. Evaluation Board Bill of Material—AD9411 PCB No. Quantity Reference Designator 1 33 C1, C3*, C4–C11, C15–C17, C18*, C19–C32, C35, C36, C39*, C40*, C58-C62 2 4 C33*, C34*, C37*, C38 C63–C66 ...

Page 23

D7– 77 D7+ 78 D8– 79 D8+ 80 D9– 81 D9+ GND 82 DRGND DRVDD 83 DVRDD 84 OR– 85 OR+ 86 AGND GND GND 87 AGND VCC 88 AVDD VCC 89 AVDD VCC 90 AVDD GND 91 AGND ...

Page 24

AD9411 VCC + C64 C16 C17 C19 10µF 0.1µF 0.1µF 0.1µF GND TO USE VF561 CRYSTAL GND R28 JN00158 100Ω E/D VCC 1 NC OUTPUTB 2 R22 GND GND OUTPUT 3 100Ω U9 POWER DOWN USE R43 OR R44 VDL ...

Page 25

Figure 48. PCB Top Side Silkscreen Figure 49. PCB Top Side Copper Routing Figure 50. PCB Ground Layer Figure 51. PCB Split Power Plane Rev Page AD9411 ...

Page 26

AD9411 Figure 52. PCB Bottom Side Copper Routing Figure 53. PCB Bottom Side Silkscreen Rev Page ...

Page 27

... SLUG. ATTACHING THE SLUG TO A GROUND PLANE WILL REDUCE THE JUNCTION TEMPERATURE OF THE DEVICE WHICH MAY BE BENEFICIAL IN HIGH TEMPERATURE ENVIRONMENTS. Figure 54. 100-Lead Thin Plastic Quad Flat Package, Exposed Pad [TQFP/EP] ORDERING GUIDE Temperature Model Range AD9411BSV-170 –40°C to +85°C AD9411BSV-200 –40°C to +85°C AD9411/PCB 16.00 SQ 14.00 SQ 100 TOP VIEW (PINS DOWN ...