STK22C48-W35 Cypress Semiconductor Corp, STK22C48-W35 Datasheet - Page 4

• Manufacturer Part Number: STK22C48-W35
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK22C48-W35

• Word Size: 8b
• Organization: 2Kx8
• Density: 16Kb
• Interface Type: Parallel
• Access Time (max): 35ns
• Operating Supply Voltage (typ): 5V
• Package Type: PDIP
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: 0C to 70C
• Pin Count: 28
• Mounting: Through Hole
• Supply Current: 75mA
• Lead Free Status / Rohs Status: Not Compliant

STK22C48
July 1999
SRAM WRITE CYCLES #1 & #2
Note k: If W is low when E goes low, the outputs remain in the high-impedance state.
Note l:
Note m: HSB must be high during SRAM WRITE cycles.
SRAM WRITE CYCLE #1: W Controlled
SRAM WRITE CYCLE #2: E Controlled
NO.
12
13
14
15
16
17
18
19
20
21
ADDRESS
DATA OUT
DATA OUT
ADDRESS
DATA IN
DATA IN
t
E or W must be ≥ V
WLQZ
t
t
t
t
t
t
t
t
t
WLWH
DVWH
WHDX
AVWH
WHAX
WHQX
ELWH
AVWL
AVAV
#1
W
E
W
E
j, k
SYMBOLS
t
t
t
t
t
t
t
t
WLEH
DVEH
EHDX
EHAX
ELEH
AVEH
AVAV
AVEL
#2
IH
t
AVWL
18
during address transitions.
t
AVEL
18
PREVIOUS DATA
Alt.
t
t
t
t
t
t
t
t
t
t
WC
CW
DW
WR
OW
WP
AW
WZ
DH
AS
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Set-up to End of Write
Data Hold after End of Write
Address Set-up to End of Write
Address Set-up to Start of Write
Address Hold after End of Write
Write Enable to Output Disable
Output Active after End of Write
t
WLQZ
20
t
AVEH
PARAMETER
17
t
AVWH
17
t
WLWH
13
t
ELWH
l, m
14
l, m
t
AVAV
t
12
AVAV
3-24
12
HIGH IMPEDANCE
t
ELEH
14
t
WLEH
13
STK22C48-20
MIN
20
15
15
15
8
0
0
0
5
HIGH IMPEDANCE
t
DVWH
15
t
DVEH
15
MAX
DATA VALID
7
DATA VALID
STK22C48-25
MIN
25
20
20
10
20
0
0
0
5
MAX
10
t
WHDX
t
WHAX
16
STK22C48-35
19
MIN
(V
35
25
25
12
25
t
t
0
0
0
5
EHAX
EHDX
19
16
CC
t
WHQX
21
MAX
13
= 5.0V ± 10%)
STK22C48-45
MIN
45
30
30
15
30
0
0
0
5
MAX
15
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
b, f