LTC1421-2.5CSW#PBF Linear Technology, LTC1421-2.5CSW#PBF Datasheet - Page 11
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LTC1421-2.5CSW#PBF
Manufacturer Part Number
LTC1421-2.5CSW#PBF
Description
Manufacturer
Linear Technology
Datasheet
1.LTC1421-2.5CSWPBF.pdf
(24 pages)
Specifications of LTC1421-2.5CSW#PBF
Linear Misc Type
Positive Low Voltage
Family Name
LTC1421
Package Type
SOIC W
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
12V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Compliant
APPLICATIONS
is connected between REF (Pin 8) and the negative supply
and the trip point of Comparator 2 set to GND.
Soft Reset Generation
A soft reset that doesn’t cycle the supply voltage can be
generated externally using Pin 11 (FB) as shown in Figure
9. For a 5V supply the FB pin is left floating to set the
internal supply monitor trip voltage to 4.65V. However, if
the FB pin is pulled to ground for more than 32 s via a push
button or open-collector logic gate, the internal trip point
will go to 5.88V and the RESET pin will pull low. RESET will
remain low for 200ms after the FB pin is released. The
RESET signal will also be pulled low when the voltage at
the V
When using a 3.3V supply, a 1k resistor must be con-
nected from the FB pin to V
to 2.90V.
Undervoltage Lockout
On power-up, an undervoltage lockout circuit prevents the
GATELO and GATEHI charge pumps from turning on until
V
Electronic Circuit Breaker
The LTC1421 features an electronic circuit breaker func-
tion that protects against short circuits or excessive cur-
rents on the supplies. By placing a sense resistor between
the supply input and set pin of either supply, the circuit
breaker will be tripped whenever the voltage across the
CCLO
OUTLO
COLLECTOR
and V
1/6 LS7404
OPEN
RESET
pin dips below 4.65V for more than 32 s.
FB
CCHI
Figure 9. Generating a Soft Reset
3.3V
have both exceeded 2.45V.
R1
1k
U
32 s
R1 USED FOR 3.3V
SUPPLY ONLY
11
INFORMATION
FB
U
CCLO
LTC1421
GND
RESET
to set the internal trip point
12
200ms
W
7
RESET
LOGIC
5V
1421 F09
U
sense resistor is greater than 50mV for more than 20 s.
When the circuit breaker trips, both N-channel MOSFETs
are quickly turned off, FAULT and PWRGD go low and
RESET is pulled low 32 s later. FAULT can be connected
to a LED or a logic signal back to the host to indicate a faulty
board. The chip will remain in the tripped state until a
power-on reset is generated, or the power on V
V
short V
If more than 20 s of response time is needed to reject
supply noise, an external resistor and capacitor can be
added to the sense circuit as shown in Figure 10.
Auxiliary V
When a short circuit occurs on the board, it is possible to
draw enough current to cause the backplane supply
voltage to collapse. If the input supply voltage collapses to
a low enough voltage and the LTC1421 gate drive circuitry
is unable to shut off the N-channel pass transistors, the
system might freeze up in a permanent short condition.
To prevent this from occurring, the gate discharge cir-
cuitry inside the LTC1421 is powered from AUXV
which is in turn powered from V
Schottky diode and current limiting resistor (Figure 11).
CCLO
is cycled. If the circuit breaker feature is not used,
CCLO
AUXV
Figure 10. Short-Circuit Protection Circuit
CC
to SETLO and V
CC
V
3
CCLO
1
23
Figure 11. AUXV
LTC1421/LTC1421-2.5
R
SENSE
C
F
1 F
24
SETLO
2
LTC1421
4
22
V
R
CCLO
F
23
GATELO V
10k
GATE DRIVE
CCHI
CIRCUITRY
Q1
CC
21
CCLO
to SETHI.
Circuitry
OUTLO
GATELO GATEHI
20
through an internal
21
1421 F10
LTC1421
1421 F11
17
CCHI
11
and
CC
,