K4S641632HUI75 Samsung Semiconductor, K4S641632HUI75 Datasheet - Page 8

• Manufacturer Part Number: K4S641632HUI75
• Manufacturer: Samsung Semiconductor
• Type: SDRAMr

Specifications of K4S641632HUI75

• Organization: 4Mx16
• Density: 64Mb
• Address Bus: 14b
• Access Time (max): 6/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 135mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, T
Notes :
Operating current
(One bank active)
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
SDRAM 64Mb H-die (x4, x8, x16)
1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S6404(08)32H-TC**
4. K4S6404(08)32H-TL**
5. Unless otherwise noted, input swing IeveI is CMOS(V
Parameter
Symbol
I
I
I
I
CC2
CC2
CC3
CC3
I
I
I
I
CC2
CC2
CC3
CC3
I
I
I
I
CC1
CC4
CC5
CC6
PS CKE & CLK ≤ V
NS
PS CKE & CLK ≤ V
NS
P
N
P
N
CKE ≤ V
CKE ≥ V
Input signals are changed one time during 20ns
CKE ≥ V
Input signals are stable
CKE ≤ V
CKE ≥ V
Input signals are changed one time during 20ns
CKE ≥ V
Input signals are stable
t
CKE ≤ 0.2V
Burst length = 1
t
I
I
Page burst
4Banks Activated
t
RC
RC
O
O
CCD
= 0 mA
= 0 mA
≥ t
≥ t
= 2CLKs
RC
RC
IL
IH
IH
IL
IH
IH
(min)
(min)
(max), t
(max), t
(min), CS ≥ V
(min), CLK ≤ V
(min), CS ≥ V
(min), CLK ≤ V
IL
IL
Test Condition
(max), t
(max), t
CC
CC
A
= 10ns
= 10ns
= 0 to 70°C for x4, x8)
IH
IH
IH
/V
CC
CC
IL
IL
(min), t
(min), t
IL
(max), t
(max), t
=V
= ∞
= ∞
DDQ
CC
CC
CC
CC
/V
= 10ns
= 10ns
SSQ)
= ∞
= ∞
C
L
Version
135
400
115
75
75
15
30
25
1
1
6
3
3
1
Rev. 1.3 August 2004
CMOS SDRAM
Unit
mA
mA
mA
mA
mA
mA
mA
mA
uA
Note
1
1
2
3
4