MT9JSF12872AZ-1G4F1 Micron Technology Inc, MT9JSF12872AZ-1G4F1 Datasheet - Page 20

• Manufacturer Part Number: MT9JSF12872AZ-1G4F1
• Manufacturer: Micron Technology Inc

Specifications of MT9JSF12872AZ-1G4F1

• Main Category: DRAM Module
• Sub-category: DDR3 SDRAM
• Module Type: 240UDIMM
• Device Core Size: 72b
• Organization: 128Mx72
• Total Density: 1GByte
• Chip Density: 1Gb
• Maximum Clock Rate: 1.333GHz
• Operating Supply Voltage (typ): 1.5V
• Operating Current: 4.41A
• Number Of Elements: 9
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Lead Free Status / Rohs Status: Compliant

Table 23: Configuration Register Bit Descriptions (Continued)
PDF: 09005aef8360c8e6
jsf9c128_256_512x72az.pdf - Rev. C 9/09 EN
10:9
Bit
6
7
8
Description
Alarm window lock bit
0: Alarm trips are not locked and can be changed
1: Alarm trips are locked and cannot be changed
Critical trip lock bit
0: Critical trip is not locked and can be changed
1: Critical trip is locked and cannot be changed
Shutdown mode
0: Enabled
1: Shutdown
Hysteresis enable
00: Disable
01: Enable at 1.5°C
10: Enable at 3°C
11: Enable at 6°C
1GB, 2GB, 4GB (x72, ECC, SR) 240-Pin DDR3 SDRAM UDIMM
Temperature Sensor with Serial Presence-Detect EEPROM
20
Notes
The shutdown mode is a power-saving mode that dis-
ables the temperature sensor.
When enabled, a hysteresis is applied to temperature
movement around the trip points (see Figure 4
(page 21)). As an example, if the hysteresis register
is enabled to a delta of 6°C, the preset trip points will
toggle when the temperature reaches the program-
med value. These values will reset when the tempera-
ture drops below the trip points minus the set
hysteresis level. In this case, this would be critical tem-
perature minus 6°C.
The hysteresis is applied to both the above alarm win-
dow and the below alarm window bits found in the
read-only temperature register (see Table 24
(page 21)). EVENT# is also affected by this register.
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