A2557SEB-T Allegro Microsystems Inc, A2557SEB-T Datasheet - Page 9

• Manufacturer Part Number: A2557SEB-T
• Manufacturer: Allegro Microsystems Inc

Specifications of A2557SEB-T

• Switch Type: Low Side
• Power Switch Family: A2557
• Input Voltage: 7V
• Output Current: 300mA
• Number Of Outputs: 4
• Mounting: Surface Mount
• Supply Current: 30mA
• Package Type: PLCC
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Pin Count: 28
• Lead Free Status / Rohs Status: Compliant

A2557
Under some conditions it is possible to get spurious glitches on
the FAULT output at load turn-on and turn-off transitions:
•
off delay (see characteristics above) of the output stage increases
and may result in a spurious fault output of a few μs (the dura-
tion being proportional to the turn-off delay). As it is diffi cult to
defi ne this over all operating conditions, if a particular applica-
tion would be sensitive to this type of glitch, then it is generally
recommended to include a small (about
0.01 μF) smoothing/storage capacitor at the FAULT output.
•
incandescent fi lament results in the driver operating in current
limit for a period after turn-on. During this period a “fault” con-
dition will be indicated (over current). As discussed above this
period can be 10s of ms. To avoid this indication, the capacitor
on the FAULT output would need to be increased to provide an
appropriate time constant. Alternatively, in a microcontroller-
based system, the code could be written to ignore the FAULT
condition for an appropriate period after lamp turn on.
Correct FAULT operation cannot be guaranteed with an uncon-
nected output — unused outputs should not be turned on, or
unused outputs should be pulled high to >2.5 V, and/or associ-
ated inputs tied low.
Light load turn-off. Under light loading conditions the turn-
Incandescent lamp turn-on. As described above, driving an
(SHORTED
FAULT
FAULT
(OPEN
LOAD)
LOAD)
IN
CIRCUIT DESCRIPTION AND APPLICATION (continued)
WITH OUTPUT CAPACITOR
with Fault Detection and Sleep Mode
Dwg. WP-035
Thermal considerations
Device power dissipation can be calculated as:
P
+ (V
Note - I
sonable approximation for most purposes.
This can then be compared against the permitted package power
dissipation, using:
where R
R
ground area. Additional information is available on the Allegro
website.
D
JA
= (V
28-lead PLCC (part number suffi x ‘–EB’) = 36°C/W
16-pin PDIP (part number suffi x ‘–B’) =
16-lead SOIC (part number suffi x ‘–LB’) = 90°C/W
CC
is measured on typical two-sided PCB with minimal copper
x I
CC
O1
JA
CC
x I
is also modulated by the duty cycle, but this is a rea-
is given as:
)
O1
x duty cycle
Permitted P
CURRENT LIMIT (24 V SUPPLY)
CURRENT LIMIT (12 V SUPPLY)
Protected Quad Driver
SHORT CIRCUIT
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
TIME
1
D
) + … + (V
= (150 – T
NOT TO SCALE
NORMAL LOAD
O4
A
)/R
Dwg. WP-013-1
x I
JA
O4
x duty cycle
43°C/W
4
)
9