MAX5102AEUE Maxim Integrated Products, MAX5102AEUE Datasheet - Page 3

IC DAC 8BIT DUAL PARALL 16-TSSOP

MAX5102AEUE

Manufacturer Part Number
MAX5102AEUE
Description
IC DAC 8BIT DUAL PARALL 16-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5102AEUE

Settling Time
6µs
Number Of Bits
8
Data Interface
Parallel
Number Of Converters
2
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power Dissipation (max)
-

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ELECTRICAL CHARACTERISTICS (continued)
(V
V
Note 1: Reduced digital code range (code 00 hex to code F0 hex) due to swing limitations when the output amplifier is loaded.
Note 2: Gain error is: [100 (V
Note 3: Output settling time is measured from the 50% point of the falling edge of WR to ±1/2LSB of V
Note 4: Channel-to-channel isolation is defined as the glitch energy at a DAC output in response to a full-scale step change on any
Note 5: Digital feedthrough is defined as the glitch energy at any DAC output in response to a full-scale step change on all eight
Note 6: R
Note 7: Timing measurement reference level is (V
DYNAMIC PERFORMANCE
POWER SUPPLIES
DIGITAL TIMING (Figure 1) (Note 7)
DD
Output Voltage Slew Rate
Output Settling Time (Note 3)
Channel-to-Channel Isolation
(Note 4)
Digital Feedthrough (Note 5)
Digital-to-Analog Glitch Impulse
Signal-to-Noise plus Distortion
Ratio
Multiplying Bandwidth
Wideband Amplifier Noise
Shutdown Recovery Time
Time to Shutdown
Power-Supply Voltage
Supply Current (Note 6)
Shutdown Current
Address to WR Setup
Address to WR Hold
Data to WR Setup
Data to WR Hold
WR Pulse Width
DD
= V
= V
REF
and V
other DAC output. The measured channel has a fixed code of 80 hex.
data inputs with WR at V
REF
PARAMETER
L
= ∞, digital inputs at GND or V
= +3V and T
= +2.7V to +5.5V, GND = 0V, R
8-Bit DAC with Rail-to-Rail Voltage Outputs
F0,ideal
+2.7V to +5.5V, Low-Power, Dual, Parallel
_______________________________________________________________________________________
is the ideal DAC output voltage with input code F0 hex (i.e., V
A
= +25°C.)
F0,meas
DD
SYMBOL
.
SINAD
- ZCE - V
t
t
V
t
SDR
SDN
I
t
t
t
t
WR
DD
AH
DS
DH
AS
DD
DD
L
.
= 10kΩ, C
F0,ideal
From code 00 to code F0 hex
To 1/2LSB, from code 00 to code F0 hex
Code 00 to code FF hex
Code 00 to code FF hex
Code 80 hex to code 7F hex
REF = 2.5Vp-p at 1kHz, V
V
REF = 2.5Vp-p at 10kHz, V
V
REF = 0.5Vp-p, V
V
To ±1/2LSB of final value of V
I
DD
DD
DD
DD
IH
< 5µA
= 3V, code FF hex
= 3V, code FF hex
= 3V, -3dB bandwidth
+ V
) / V
IL
L
REF
) / 2.
= 100pF, T
]. Where V
CONDITIONS
REF(DC)
A
F0,meas
= T
REF(DC)
= 1.5V,
REF(DC)
MIN
OUT
to T
is the DAC output voltage with input code F0 hex,
= 1.5V,
= 1.5V,
MAX
REF
, unless otherwise noted. Typical values are at
·
240 / 256).
MIN
2.7
25
20
5
0
0
OUT
’s final value.
0.001
TYP
500
650
190
0.6
0.5
90
70
60
60
13
20
6
MAX
360
5.5
1
UNITS
µV
V/µs
kHz
nVs
nVs
nVs
dB
µA
µA
µs
µs
µs
ns
ns
ns
ns
ns
RMS
V
3

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