STK14D88-N45 Cypress Semiconductor Corp, STK14D88-N45 Datasheet - Page 7

• Manufacturer Part Number: STK14D88-N45
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK14D88-N45

• Word Size: 8b
• Organization: 32Kx8
• Density: 256Kb
• Interface Type: Parallel
• Access Time (max): 45ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: SOIC
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Pin Count: 32
• Mounting: Surface Mount
• Supply Current: 50mA
• Lead Free Status / Rohs Status: Not Compliant

Document Number: 001-52037 Rev. *A
Notes
SRAM WRITE Cycle #1 and #2
NO.
8. If W is low when E goes low, the outputs remain in the high-impedance state.
9. E or W must be
12
13
14
15
16
17
18
19
20
21
t
WLQZ
t
t
t
t
t
t
t
t
t
WLWH
DVWH
WHDX
WHQX
AVWH
WHAX
ELWH
AVWL
AVAV
#1
[6, 8]
ADDRESS
DATA OUT
DATA OUT
DATA IN
ADDRESS
≥
DATA IN
V
Symbols
IH
W
E
during address transitions.
t
t
t
t
W
t
t
t
t
WLEH
E
DVEH
EHDX
EHAX
ELEH
AVEH
AVEL
AVAV
#2
t
AVWL
18
t
Alt.
t
t
t
t
t
t
t
t
t
t
OW
WC
WP
CW
DW
AW
WR
WZ
DH
AS
AVEL
18
PREVIOUS DATA
Figure 6. SRAM WRITE Cycle 1: W Controlled
Figure 7. SRAM WRITE Cycle 2: E Controlled
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Set-up to End of Write
Data Hold after End of Write
Address Set-up to End of Write
Address Set-up to Start of Write
Address Hold after End of Write
Write Enable to Output Disable
Output Active after End of Write
t
WLQZ
20
t
AVEH
17
t
AVWH
17
Parameter
t
WLWH
13
t
ELWH
14
t
AVAV
12
t
ELEH
t
14
WLEH
13
t
AVAV
HIGH IMPEDANCE
12
HIGH IMPEDANCE
t
t
DVWH
DVEH
15
15
DATA VALID
STK14D88-25 STK14D88-35 STK14D88-45
DATA VALID
Min
25
20
10
20
20
0
0
0
3
Max
10
[8, 9]
[8, 9]
t
WHDX
t
WHAX
13
t
19
EHDX
t
16
EHAX
19
Min
t
35
25
25
12
25
WHQX
0
0
0
3
21
Max
13
Min
45
30
15
30
30
0
0
0
3
STK14D88
Max
Page 7 of 18
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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