IDT70261S55PFI IDT, Integrated Device Technology Inc, IDT70261S55PFI Datasheet

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IDT70261S55PFI

Manufacturer Part Number
IDT70261S55PFI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT70261S55PFI

Lead Free Status / Rohs Status
Not Compliant
Features
Functional Block Diagram
©2009 Integrated Device Technology, Inc.
NOTES:
1. (MASTER): BUSY is output; (SLAVE): BUSY is input.
2. BUSY and INT outputs are non-tri-stated push-pull.
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed access
– Commercial: 15/20/25/35/55ns (max.)
– Industrial 20/25ns (max.)
Low-power operation
– IDT70261S
– IDT70261L
Separate upper-byte and lower-byte control for multiplexed
bus compatibility
Active: 750mW (typ.)
Standby: 5mW (typ.)
Active: 750mW (typ.)
Standby: 1mW (typ.)
I/O
I/O
BUSY
8L
0L
INT
-I/O
SEM
R/
-I/O
UB
A
OE
CE
LB
L
A
W
(1,2)
13L
L
15L
0L
(2)
L
7L
L
L
L
L
L
Decoder
Address
R/W
OE
CE
L
L
L
14
Control
HIGH-SPEED
16K x 16 DUAL-PORT
STATIC RAM WITH INTERRUPT
I/O
ARBITRATION
SEMAPHORE
INTERRUPT
MEMORY
ARRAY
LOGIC
M/S
1
IDT70261 easily expands data bus width to 32 bits or more
using the Master/Slave select when cascading more than
one device
M/S = H for BUSY output flag on Master,
M/S = L for BUSY input on Slave
Busy and Interrupt Flags
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
TTL-compatible, single 5V (±10%) power supply
Available in 100-pin Thin Quad Flatpack
Industrial temperature range (-40
for selected speeds
Control
I/O
14
Decoder
Address
CE
OE
R/W
R
R
R
O
C to +85
JANUARY 2009
IDT70261S/L
3039 drw 01
INT
SEM
O
BUSY
R/
UB
CE
I/O
A
A
LB
OE
I/O
C) is available
13R
0R
W
R
R
R
8R
R
0R
(2)
R
R
R
-I/O
-I/O
R
(1,2)
15R
7R
DSC 3039/10

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IDT70261S55PFI Summary of contents

Page 1

Features True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed access – Commercial: 15/20/25/35/55ns (max.) – Industrial 20/25ns (max.) Low-power operation – IDT70261S Active: 750mW (typ.) Standby: 5mW (typ.) – IDT70261L Active: 750mW (typ.) Standby: ...

Page 2

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Description The IDT70261 is a high-speed 16K x 16 Dual-Port Static RAM. The IDT70261 is designed to be used as a stand-alone Dual-Port RAM combination MASTER/SLAVE Dual-Port ...

Page 3

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Maximum Operating Temperature and Supply Voltage (1,2) Ambient Grade Temperature Commercial + Industrial - + NOTES: 1. This is ...

Page 4

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Absolute Maximum Ratings Symbol Rating (2) V Terminal Voltage TERM with Respect to GND T Temperature BIAS Under Bias T Storage STG Temperature I DC Output OUT Current NOTES: 1. ...

Page 5

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter Dynamic Operating Current CC SEM = V (Both Ports Active ...

Page 6

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol READ CYCLE t Read Cycle Time RC t Address Access Time AA (3) t Chip Enable Access Time ...

Page 7

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Waveform of Read Cycles ADDR CE OE UB, LB R/W DATA OUT BUSY OUT NOTES: 1. Timing depends on which signal is asserted last, OE, CE, LB, or UB. 2. ...

Page 8

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Symbol Parameter WRITE CYCLE t Write Cycle Time WC (3) t Chip Enable to End-of-Write EW t Address Valid to ...

Page 9

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Timing Waveform of Write Cycle No. 1, R/W Controlled Timing ADDRESS OE ( SEM ( ( R/W (4) DATA OUT DATA IN Timing ...

Page 10

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Timing Waveform of Semaphore Read after Write Timing, Either Side VALID ADDRESS SEM I R/W OE NOTES ...

Page 11

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol BUSY TIMING (M/S BUSY Access Time from Address Match t BAA BUSY Disable Time from Address ...

Page 12

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Timing Waveform of Write with Port-to-Port Read and BUSY (M ADDR "A" R/W "A" DATA IN "A" (1) t APS ADDR "B" BUSY "B" DATA OUT "B" NOTES: ...

Page 13

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Waveform of BUSY Arbitration Controlled by CE Timing (M ADDR "A" and "B" CE "A" (2) t APS CE "B" BUSY "B" Waveform of BUSY Arbitration Cycle Controlled ...

Page 14

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Waveform of Interrupt Timing ADDR "A" ( "A" R/W "A" INT "B" ADDR "B" ( "B" OE "B" INT "B" NOTES: 1. All timing ...

Page 15

... The message (16 bits) at 3FFE or 3FFF is user-defined since addressable SRAM location. If the interrupt function is not used, address locations 3FFE and 3FFF are not used as mail boxes, but as part of the random access memory. Refer to Truth Table III for the interrupt operation ...

Page 16

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Busy Logic Busy Logic provides a hardware indication that both ports of the RAM have accessed the same location at the same time. It also allows one of the two ...

Page 17

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt that semaphore’s status or remove its request for that semaphore to perform another task and occasionally attempt again to gain control of the token via the set and test sequence. ...

Page 18

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt of the resource after the left processor, it would read back a one in response to the zero it had attempted to write into Semaphore 0. At this point, the ...

Page 19

IDT70261S/L High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Ordering Information XXXXX A 999 Device Power Speed Package Type NOTE: 1. Contact your local sales office for Industrial temp range for other speeds, packages and powers. Datasheet Document History ...

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