ISPLSI 2064E-100LT100 Lattice, ISPLSI 2064E-100LT100 Datasheet - Page 9

• Manufacturer Part Number: ISPLSI 2064E-100LT100
• Description: CPLD ispLSI® 2000E Family 2K Gates 64 Macro Cells 100MHz EECMOS Technology 5V 100-Pin TQFP
• Manufacturer: Lattice

Specifications of ISPLSI 2064E-100LT100

• Package: 100TQFP
• Family Name: ispLSI® 2000E
• Device System Gates: 2000
• Maximum Propagation Delay Time: 13 ns
• Number Of User I/os: 64
• Number Of Logic Blocks/elements: 16
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 100 MHz
• Operating Temperature: 0 to 70 °C

1. NC pins are not to be connected to any active signals, VCC or GND.
2. Pins have dual function capability.
Pin Description
GND
VCC
VCCIO
GOE 0, GOE 1
I/O 0 - I/O 3
I/O 4 - I/O 7
I/O 8 - I/O 11
I/O 12 - I/O 15
I/O 16 - I/O 19
I/O 20 - I/O 23
I/O 24 - I/O 27
I/O 28 - I/O 31
I/O 32 - I/O 35
I/O 36 - I/O 39
I/O 40 - I/O 43
I/O 44 - I/O 47
I/O 48 - I/O 51
I/O 52 - I/O 55
I/O 56 - I/O 59
I/O 60 - I/O 63
Y0, Y1, Y2
RESET
BSCAN
TDI/IN 0
TMS/IN 1
TDO/IN 2
TCK/IN 3
NC
1
NAME
2
2
2
2
TQFP PIN NUMBERS
12,
10,
17,
21,
29,
33,
40,
44,
48,
56,
67,
71,
79,
83,
90,
94,
98,
11,
15
2,
51,
1,
14
16
37
39
60
50,
89,
66,
6,
64
18,
22,
30,
34,
41,
45,
53,
57,
68,
72,
80,
84,
91,
95,
65,
13,
63,
24,
26,
99,
61,
87
3,
7,
19,
23,
31,
35,
42,
46,
54,
58,
69,
73,
81,
85,
92,
96,
62
25,
74,
52,
27,
76,
100
4,
8,
20,
28,
32,
36,
43,
47,
55,
59,
70,
78,
82,
86,
93,
97,
38,
88
75
49,
77,
5,
9
Global Output Enable input pins.
Input/Output Pins - These are the general purpose I/O pins used by the
logic array.
Ground (GND)
V
Supply voltage for output drivers, 5V or 3.3V. All VCCIO pins must
be connected to the same voltage level.
Dedicated Clock input. This clock input is connected to one of the
clock inputs of all of the GLBs on the device.
Active Low (0) Reset pin which resets all of the registers in the device.
Input - Dedicated in-system programming enable input pin. This pin is
brought low to enable the programming mode. The TMS, TDI, TDO
and TCK options become active.
Input - This pin performs two functions. When BSCAN is logic low, it
functions as an input pin to load programming data into the device.
TDI/IN0 also is used as one of the two control pins for the JTAG state
machine. When BSCAN is high, it functions as a dedicated input pin.
Input - This pin performs two functions. When BSCAN is logic low, it
functions as a pin to control the operation of the JTAG state machine.
When BSCAN is high, it functions as a dedicated input pin.
Output/Input - This pin performs two functions. When BSCAN is logic
low, it functions as an output pin to read serial shift register data.
When BSCAN is high, it functions as a dedicated input pin.
Input - This pin performs two functions. When BSCAN is logic low, it
functions as a clock pin for the Serial Shift Register. When BSCAN is
high, it functions as a dedicated input pin.
No Connect.
CC
9
Specifications ispLSI 2064E
DESCRIPTION
Table 2-0002-2064E.eps