74LVC1G125GV NXP Semiconductors, 74LVC1G125GV Datasheet - Page 2

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74LVC1G125GV

Manufacturer Part Number
74LVC1G125GV
Description
Buffer/Line Driver 1-CH Non-Inverting 3-ST CMOS 5-Pin SOT-753 T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC1G125GV

Package
5SOT-753
Logic Family
LVC
Logic Function
Buffer/Line Driver
Number Of Outputs Per Chip
1
Output Type
3-State
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
2.5(Typ)@2.7V|2.1(Typ)@3.3V|1.7(Typ)@5V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVC1G125GV
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
74LVC1G125GV
Quantity:
9 390
Part Number:
74LVC1G125GV,125
Manufacturer:
NXP Semiconductors
Quantity:
4 450
Part Number:
74LVC1G125GVЈ¬125
Manufacturer:
NXP
Quantity:
12 000
NXP Semiconductors
3. Ordering information
Table 1.
4. Marking
Table 2.
[1]
5. Functional diagram
74LVC1G125
Product data sheet
Type number
74LVC1G125GW
74LVC1G125GV
74LVC1G125GM
74LVC1G125GF
74LVC1G125GN
Type number
74LVC1G125GW
74LVC1G125GV
74LVC1G125GM
74LVC1G125GF
74LVC1G125GN
74LVC1G125GS
74LVC1G125GS
Fig 1.
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
2
1
Logic symbol
Ordering information
Marking
OE
A
mna118
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
Y
4
All information provided in this document is subject to legal disclaimers.
Fig 2.
TSSOP5
SC-74A
XSON6
XSON6
XSON6
XSON6
Rev. 9 — 29 December 2010
2
1
IEC logic symbol
EN
plastic thin shrink small outline package; 5 leads;
Description
body width 1.25 mm
plastic surface-mounted package; 5 leads
plastic extremely thin small outline package;
no leads; 6 terminals; body 1  1.45  0.5 mm
plastic extremely thin small outline package;
no leads; 6 terminals; body 1  1  0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9  1.0  0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0  1.0  0.35 mm
Marking code
VM
V25
VM
VM
VM
VM
mna119
4
[1]
Fig 3.
OE
A
Bus buffer/line driver; 3-state
Logic diagram
74LVC1G125
© NXP B.V. 2010. All rights reserved.
Version
SOT353-1
SOT753
SOT886
SOT891
SOT1115
SOT1202
mna120
2 of 19
Y

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