M4A5-64/32-12VNI48 Lattice, M4A5-64/32-12VNI48 Datasheet - Page 34
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M4A5-64/32-12VNI48
Manufacturer Part Number
M4A5-64/32-12VNI48
Description
CPLD ispMACH™ 4A Family 2.5K Gates 64 Macro Cells 66.7MHz/95MHz EECMOS Technology 5V 48-Pin TQFP Tray
Manufacturer
Lattice
Datasheet
1.M4A5-6432-10JNC.pdf
(62 pages)
Specifications of M4A5-64/32-12VNI48
Package
48TQFP
Family Name
ispMACHÂ 4A
Device System Gates
2500
Number Of Macro Cells
64
Maximum Propagation Delay Time
12 ns
Number Of User I/os
32
Typical Operating Supply Voltage
5 V
Maximum Operating Frequency
66.7|95 MHz
Number Of Product Terms Per Macro
20
Operating Temperature
-40 to 85 °C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M4A5-64/32-12VNI48
Manufacturer:
Lattice
Quantity:
70
Company:
Part Number:
M4A5-64/32-12VNI48
Manufacturer:
LATT
Quantity:
4 188
Company:
Part Number:
M4A5-64/32-12VNI48
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
BLOCK DIAGRAM – M4A3-384/160, M4A3-384/192
34
Detail A
Block C
Block F
Block G
Block J
16
16
16
16
24
24
24
24
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
Output Switch
AND Logic Array
Output Switch
Output Switch
AND Logic Array
Output Switch
AND Logic Array
Macrocells
Macrocells
Macrocells
Macrocells
I/O Cells
Matrix
I/O Cells
I/O Cells
Matrix
I/O Cells
Matrix
72 X 90
Matrix
72 X 90
Block K
Block B
72 X 90
72 X 90
16
16
16
16
8
8
8
8
8
36
8
36
36
16
16
8
36
16
16
8
8
8
8
8
4
4
4
4
4
4
4
4
4
4
4
4
Block D
Block E
Block H
Block I
16
16
16
16
24
24
24
24
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
Output Switch
AND Logic Array
AND Logic Array
Output Switch
Output Switch
Output Switch
Macrocells
Macrocells
Macrocells
Macrocells
I/O Cells
I/O Cells
I/O Cells
Matrix
I/O Cells
Matrix
Matrix
72 X 90
Matrix
72 X 90
Block A
72 X 90
72 X 90
Block L
16
16
16
16
8
8
8
8
8
36
36
16
16
8
8
36
36
16
16
8
ispMACH 4A Family
8
8
8
8
4
4
4
4
4
4
4
4
4
4
4
4
Repeat Detail A
4
CLK0–CLK3
4
4
4
4
4
4
4
4
4
4
4
4
4
4
8
8
8
8
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
Output Switch
Output Switch
Output Switch
Output Switch
Block HX
I/O Cells
Macrocells
I/O Cells
Macrocells
72 X 90
72 X 90
Macrocells
I/O Cells
72 X 90
72 X 90
Macrocells
I/O Cells
Block M
16
16
36
36
16
16
16
16
36
36
16
16
Matrix
Matrix
8
8
8
8
Matrix
Matrix
8
8
8
8
16
16
16
16
24
24
24
24
16
16
16
16
Block EX
Block DX
Block AX
Block P
4
4
4
4
4
4
4
4
4
4
4
4
8
8
8
8
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
Output Switch
Output Switch
Output Switch
Output Switch
Block GX
I/O Cells
Macrocells
I/O Cells
I/O Cells
Macrocells
I/O Cells
Macrocells
72 X 90
72 X 90
Macrocells
72 X 90
72 X 90
Block N
16
16
36
36
16
16
16
16
36
36
16
16
Matrix
8
Matrix
8
8
Matrix
8
Matrix
8
8
8
8
16
16
16
16
24
24
24
24
16
16
16
16
Block FX
Block CX
Block BX
Block O
17466G-067