AD1866N Analog Devices Inc, AD1866N Datasheet - Page 7

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AD1866N

Manufacturer Part Number
AD1866N
Description
IC DAC AUDIO 16BIT DUAL 16-DIP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD1866N

Rohs Status
RoHS non-compliant
Number Of Bits
16
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
70mW
Operating Temperature
-35°C ~ 85°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Settling Time
-

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REV. 0
Figure 8a illustrates the traditional approach used to generate
false ground voltages in single supply audio systems. This cir-
cuit requires additional power and circuit board space.
The AD1866 eliminates the need for “false ground” circuitry.
V
generated by the “false ground.” As shown in Figure 8b, V
and V
channel. This permits a dc coupled output signal path. This
eliminates ac coupling capacitors and improves low frequency
performance. It should be noted that these bias outputs have
relatively high output impedance and will not drive output cur-
rents larger than 100 A without degrading the specified
performance.
B
R and V
B
L may be used as the reference point in each output
Figure 8a. Schematic Using False Ground
B
L generate the required bias voltages previously
V
V
O
O
L
R
+ 5V
FALSE GROUND
(2.5V)
+ 5V
+ 5V
V
V
O
O
L
R
B
R
–7–
Analog Circuit Considerations–AD1866
DISTORTION PERFORMANCE AND TESTING
The THD+N figure of an audio DAC represents the amount of
undesirable signal produced during reconstruction and play-
back of an audio waveform. Therefore, the THD+N specifica-
tion provides a direct measure to classify and choose an audio
DAC for a desired level of performance. Figure 1 illustrates the
typical THD+N versus frequency performance of the AD1866.
It is evident that the THD+N performance of the AD1866 re-
mains stable at all three amplitude levels through a wide range
of frequencies. A load impedance of at least 2 k is recom-
mended for best THD+N performance.
Analog Devices tests all AD1866s on the basis of THD+N per-
formance. During the distortion test, a high speed digital pat-
tern generator transmits digital data to each channel of the
device under test. Sixteen-bit data is latched into the DAC at
352.8 kHz (8
990.5 Hz sine wave with 0 dB, –20 dB, and –60 dB amplitudes.
A 4096 point FFT calculates total harmonic distortion + noise,
signal-to-noise ratio, and D-range. No deglitchers or external
adjustments are used.
1
2
5
6
7
8
3
4
V
LL
CLK
DR
DL
LR
DGND
V
L
B
Figure 8b. Circuitry Using Voltage Biases
AD1866
R
F
AGND
S
NRR
V
NRL
). The test input code is a digitally encoded
V
V
V
O
V
O
B
S
S
R
L
L
14
10
16
15
13
12
11
9
+5V
+5V
V
O
V
R
O
L

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