AD1868N-J Analog Devices Inc, AD1868N-J Datasheet - Page 5

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AD1868N-J

Manufacturer Part Number
AD1868N-J
Description
IC DAC AUDIO DUAL SNGL 16DIP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD1868N-J

Rohs Status
RoHS non-compliant
Number Of Bits
18
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
70mW
Operating Temperature
-35°C ~ 85°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Settling Time
-
REV. A
ANALOG CIRCUIT CONSIDERATIONS
GROUNDING RECOMMENDATIONS
The AD1868 has two ground pins, designated as AGND (Pin
12) and DGND (Pin 7). The analog ground, AGND, serves as
the “high quality” reference ground for analog signals and as a
return path for the supply current from the analog portion of the
device. The system analog common should be located as close
as possible to Pin 12 to minimize any voltage drop which may
develop between these two points, although the internal circuit
is designed to minimize signal dependence of the analog return
current.
The digital ground, DGND, returns ground current from the
digital logic portion of the device. This pin should be connected
to the digital common node in the system. As shown in Figure
7, the analog and digital grounds should be joined at one point
in the system. When these two grounds are remotely connected
such as at the power supply ground, care should be taken to
minimize the voltage difference between the DGND and AGND
pins in order to ensure the specified performance.
POWER SUPPLIES AND DECOUPLING
The AD1868 has three power supply input pins. V
15) provides the supply voltages which operate the analog por-
tion of the device including the 18-bit DACs, the voltage refer-
ences, and the output amplifiers. The V
to operate with a +5 V supply. These pins should be decoupled
to analog common using a 0.1 F capacitor. Good engineering
practice suggests that the bypass capacitors be placed as close as
possible to the package pins. This minimizes the inherent induc-
tive effects of printed circuit board traces.
V
input shift registers and the input latching circuitry. V
designed to operate with a +5 V supply. This pin should be by-
passed to digital common using a 0.1 F capacitor, again placed
as close as possible to the package pin. Figure 7 illustrates the cor-
rect connection of the digital and analog supply bypass capacitors.
An important feature of the AD1868 audio DAC is its ability to
operate at reduced power supply voltages. This feature is very
important in portable battery operated systems. As the batteries
discharge, the supply voltage drops. Unlike any other audio
L
(Pin 1) operates the digital portions of the chip including the
DGND
V
CK
DR
LL
DL
LR
V
B
R
L
1
4
6
2
3
5
7
8
Functional Block Diagram
REGISTER
REGISTER
18-BIT
18-BIT
DAC
SERIAL
DAC
SERIAL
18-BIT
18-BIT
V
V
AD1868
REF
REF
+
+
S
supplies are designed
13
14
10
16
15
12
11
9
S
V
V
NRL
AGND
V
V
NRR
V
O
S
O
B
S
(Pins 9 and
L
R
L
L
is also
–5–
DAC, the AD1868 can continue to function at supply voltages
as low as 3.5 V. Because of its unique design, the power require-
ments of the AD1868 diminish as the battery voltage drops, fur-
ther extending the operating time of the system.
NOISE REDUCTION CAPACITORS
The AD1868 has two noise reduction pins designated as NRL
(Pin 13) and NRR (Pin 11). It is recommended that external
noise reduction capacitors be connected from these pins to
AGND to reduce the output noise contributed by the voltage
reference circuitry. As shown in Figure 7, each of these pins
should be bypassed to AGND with a 4.7 F or larger capacitor.
The connections between the capacitors, package pins and
AGND should be as short as possible to achieve the lowest
noise.
USING V
The AD1868 has two bias voltage reference pins, designated as
V
voltage equal to the center of the output voltage swing. These
bias voltages replace “False Ground” networks previously required
in single-supply audio systems. At the same time, they allow dc-
coupled systems, improving audio performance.
Figure 8a illustrates the traditional approach used to generate
False Ground voltages in single-supply audio systems. This cir-
cuit requires additional power and circuit board space.
B
R (Pin 8) and V
Figure 7. Recommended Circuit Schematic
Figure 8a. Schematic Using False Ground
B
L AND V
0.1µF
DGND
DATA
CLK
–V
+V
NC
NC
LE
S
L
B
L (Pin 16). These pins supply a dc reference
1
3
4
5
6
7
8
2
B
4
8
1
2
3
5
6
7
R
AD1851
CK
DR
V
LL
DL
LR
DGND
V
CONTROL
L
B
LOGIC
R
REGISTER
AD1868
LATCH
SERIAL
16-BIT
INPUT
NC = NO CONNECT
AGND
NRL
NRR
V
V
V
O
O
B
V
V
R
L
L
S
S
16-BIT
DAC
11
10
16
15
14
13
12
9
I
OUT
4.7µF
4.7µF
12
16
15
14
13
11
10
9
+V
TRIM
I
AGND
SJ
R
V
MSB
ADJ
SUPPLY
OUT
POWER
F
OUT
S
AD1868
0.1µF

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