EPM570F256C5 Altera, EPM570F256C5 Datasheet - Page 2
![IC MAX II CPLD 570 LE 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EPM570F256C5
Manufacturer Part Number
EPM570F256C5
Description
IC MAX II CPLD 570 LE 256-FBGA
Manufacturer
Altera
Series
MAX® IIr
Specifications of EPM570F256C5
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
5.4ns
Voltage Supply - Internal
2.5V, 3.3V
Number Of Logic Elements/blocks
570
Number Of Macrocells
440
Number Of I /o
160
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-FBGA
Voltage
2.5V, 3.3V
Memory Type
FLASH
Number Of Logic Elements/cells
570
Family Name
MAX II
# Macrocells
440
Frequency (max)
1.8797GHz
Propagation Delay Time
8.7ns
Number Of Logic Blocks/elements
57
# I/os (max)
160
Operating Supply Voltage (typ)
2.5/3.3V
In System Programmable
Yes
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1296
EPM570F256C5
EPM570F256C5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM570F256C5
Manufacturer:
MAXIM
Quantity:
112 543
Company:
Part Number:
EPM570F256C5N
Manufacturer:
ALTERA
Quantity:
56
Company:
Part Number:
EPM570F256C5N
Manufacturer:
ALTERA
Quantity:
513
Part Number:
EPM570F256C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EPM570F256C5NRR
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
1–2
Table 1–1. MAX II Family Features
MAX II Device Handbook
LEs
Typical Equivalent Macrocells
Equivalent Macrocell Range
UFM Size (bits)
Maximum User I/O pins
t
f
t
t
Notes to
(1) t
(2) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay will run faster than this number.
PD1
CNT
SU
CO
(ns)
(ns)
(ns)
(MHz)
implemented in a single LUT and LAB that is adjacent to the output pin.
P D1
represents a pin-to-pin delay for the worst case I/O placement with a full diagonal path across the device and combinational logic
Table
(1)
(2)
Feature
f
1–1:
Table 1–1
For more information about equivalent macrocells, refer to the
Macrocell Conversion Methodology
MAX II and MAX IIG devices are available in three speed grades: –3, –4, and –5, with
–3 being the fastest. Similarly, MAX IIZ devices are available in three speed grades: –6,
–7, and –8, with –6 being the fastest. These speed grades represent the overall relative
performance, not any specific timing parameter. For propagation delay timing
numbers within each speed grade and density, refer to the
Characteristics
Table 1–2
Table 1–2. MAX II Speed Grades
EPM240
EPM240G
EPM570
EPM570G
EPM1270
EPM1270G
EPM2210
EPM2210G
EPM240Z
EPM570Z
Device
128 to 240
shows the MAX II family features.
EPM240G
shows MAX II device speed-grade offerings.
EPM240
8,192
240
192
304
4.7
1.7
4.3
80
chapter in the MAX II Device Handbook.
v
v
v
v
–3
—
—
240 to 570
EPM570G
EPM570
8,192
570
440
160
304
5.4
1.2
4.5
–4
v
v
v
v
—
—
570 to 1,270
white paper.
EPM1270G
EPM1270
1,270
8,192
980
212
304
6.2
1.2
4.6
–5
v
v
v
v
—
—
Speed Grade
1,270 to 2,210
EPM2210G
EPM2210
v
v
–6
—
—
—
—
2,210
1,700
8,192
272
304
7.0
1.2
4.6
DC and Switching
v
v
–7
—
—
—
—
© August 2009 Altera Corporation
MAX II Logic Element to
128 to 240
EPM240Z
8,192
240
192
152
7.5
2.3
6.5
80
Chapter 1: Introduction
v
v
–8
—
—
—
—
240 to 570
EPM570Z
8,192
570
440
160
152
9.0
2.2
6.7
Features