ATF1504BE-7AU100 Atmel, ATF1504BE-7AU100 Datasheet - Page 9

• Manufacturer Part Number: ATF1504BE-7AU100
• Description: IC CPLD 64MC 1.8V 100-TQFP
• Manufacturer: Atmel
• Series: ATF1504BEr

Specifications of ATF1504BE-7AU100

• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 1.7 V ~ 1.9 V
• Number Of Macrocells: 64
• Number Of I /o: 80
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Features: CMOS/TTL Compatible
• Voltage: 1.8V
• Memory Type: CMOS
• For Use With: ATF15XX-DK3 - KIT DEV FOR ATF15XX CPLD'S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -

2.2
2.3
2.4
2.5
3637B–PLD–1/08
Schmitt Trigger
Output Drive Capability
I/O Bank
I/O Standard
The Input Buffer of each input and I/O pin has an optional schmitt trigger setting. The schmitt
trigger option can be used to buffer inputs with slow rise times.
Each output has a high/low drive option. The low drive option (slow slew rate) can be used to
reduce system noise by slowing down outputs that do not need to operate at maximum speed or
drive strength. Outputs default to high drive strength by Atmel software and can be set to low
drive strength through the slew rate option.
The I/O pins of the ATF1504BE are grouped into two banks, Bank A and Bank B. Bank A com-
prises of I/O pins for macrocells 1 to 32 (Logic Block A and B), and it is powered by V
B comprises of I/O pins for macrocells 33 to 64 (Logic Block C and D), and it is powered by
V
The ATF1504BE supports a wide range of I/O standards which include LVTTL, LVCMOS33,
LVCMOS25, LVCMOS18 and LVCMOS15. The I/O pins of the ATF1504BE can also be individ-
ually configured to support SSTL-2 (Class I) and SSTL-3 (Class I) advanced I/O standards.
This and the two I/O banks, together, allow the ATF1504BE to be used for voltage level
translation.
CCIOB
.
ATF1504BE
CCIOA
. Bank
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