EPM7128BTC100-7 Altera, EPM7128BTC100-7 Datasheet - Page 6

• Manufacturer Part Number: EPM7128BTC100-7
• Description: IC MAX 7000 CPLD 128 100-TQFP
• Manufacturer: Altera
• Series: MAX® 7000Br

Specifications of EPM7128BTC100-7

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 2.375 V ~ 2.625 V
• Number Of Logic Elements/blocks: 8
• Number Of Macrocells: 128
• Number Of Gates: 2500
• Number Of I /o: 84
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Voltage: 2.5V
• Memory Type: EEPROM
• Number Of Logic Elements/cells: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

MAX 7000B Programmable Logic Device Data Sheet
Figure 1. MAX 7000B Device Block Diagram
Note:
(1)
6
EPM7032B, EPM7064B, EPM7128B, and EPM7256B devices have six output enables. EPM7512B devices have ten
output enables.
INPUT/OE2/GCLK2
INPUT/GCLRn
INPUT/GCLK1
INPUT/OE1
2 to 16 I/O
2 to 16 I/O
6 or 10 Output Enables (1)
Control
Control
Block
Block
I/O
I/O
Logic Array Blocks
The MAX 7000B device architecture is based on the linking of
high-performance LABs. LABs consist of 16 macrocell arrays, as shown in
Figure
is fed by all dedicated input pins, I/O pins, and macrocells.
Each LAB is fed by the following signals:
■
■
■
6 or 10
6 or 10
2 to 16
2 to 16
2 to 16
2 to 16
36 signals from the PIA that are used for general logic inputs
Global controls that are used for secondary register functions
Direct input paths from I/O pins to the registers that are used for fast
setup times
1. Multiple LABs are linked together via the PIA, a global bus that
LAB A
LAB C
Macrocells
Macrocells
33 to 48
1 to 16
2 to 16
2 to 16
16
16
36
36
PIA
36
36
2 to 16
2 to 16
16
16
Macrocells
Macrocells
17 to 32
49 to 64
LAB D
LAB B
6 or 10 Output Enables (1)
2 to 16
2 to 16
2 to 16
2 to 16
Control
Control
Block
Block
Altera Corporation
I/O
I/O
6 or 10
6 or 10
2 to 16 I/O
2 to 16 I/O