EPM2210F256I5 Altera, EPM2210F256I5 Datasheet - Page 34
![IC MAX II CPLD 2210 LE 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EPM2210F256I5
Manufacturer Part Number
EPM2210F256I5
Description
IC MAX II CPLD 2210 LE 256-FBGA
Manufacturer
Altera
Series
MAX® IIr
Specifications of EPM2210F256I5
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.0ns
Voltage Supply - Internal
2.5V, 3.3V
Number Of Logic Elements/blocks
2210
Number Of Macrocells
1700
Number Of I /o
204
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
256-FBGA
Voltage
2.5V, 3.3V
Memory Type
FLASH
Number Of Logic Elements/cells
2210
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
544-2267
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM2210F256I5N
Manufacturer:
ALTERA
Quantity:
648
Part Number:
EPM2210F256I5N
Manufacturer:
ALTERA
Quantity:
20 000
2–26
Figure 2–21. Column I/O Block Connection to the Interconnect
Note to
(1) Each of the four IOEs in the column I/O block can have one data_out or fast_out output, one OE output, and one data_in input.
I/O Standards and Banks
MAX II Device Handbook
Figure
Local Interconnect
2–21:
I/O Block
LAB Local
Interconnect
Figure 2–21
MAX II device IOEs support the following I/O standards:
■
■
■
■
■
R4 Interconnects
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
3.3-V PCI
data_out
C4 Interconnects
[3..0]
shows how a column I/O block connects to the logic array.
LAB
4
[3..0]
OE
4
Column I/O Block
Interconnect
LAB Local
Interconnect
fast_out
Fast I/O
(Note 1)
[3..0]
Path
LAB
4
LAB Column
Clock [3..0]
4
data_in
[3..0]
C4 Interconnects
© October 2008 Altera Corporation
Column I/O
Block Contains
Up To 4 IOEs
LAB Local
Interconnect
Chapter 2: MAX II Architecture
LAB
I/O Structure