EPM7128STC100-6 Altera, EPM7128STC100-6 Datasheet - Page 7
![IC MAX 7000 CPLD 128 100-TQFP](/photos/6/70/67055/544-100-tqfp_sml.jpg)
EPM7128STC100-6
Manufacturer Part Number
EPM7128STC100-6
Description
IC MAX 7000 CPLD 128 100-TQFP
Manufacturer
Altera
Series
MAX® 7000r
Datasheet
1.EPM7064STC44-10.pdf
(66 pages)
Specifications of EPM7128STC100-6
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
6.0ns
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number Of Logic Elements/blocks
8
Number Of Macrocells
128
Number Of Gates
2500
Number Of I /o
84
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
5V
Memory Type
EEPROM
Number Of Logic Elements/cells
8
Family Name
MAX 7000S
# Macrocells
128
Number Of Usable Gates
2500
Frequency (max)
166.7MHz
Propagation Delay Time
6ns
Number Of Logic Blocks/elements
8
# I/os (max)
84
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2331
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM7128STC100-6
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EPM7128STC100-6N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Figure 1. EPM7032, EPM7064 & EPM7096 Device Block Diagram
Altera Corporation
INPUT/GLCK1
INPUT/GCLRn
INPUT/OE1
INPUT/OE2
8 to 16
I/O pins
8 to 16
I/O pins
Control
Control
Block
Block
I/O
I/O
8 to 16
8 to 16
LAB A
LAB C
The MAX 7000 architecture includes four dedicated inputs that can
be used as general-purpose inputs or as high-speed, global control
signals (clock, clear, and two output enable signals) for each
macrocell and I/O pin.
EPM7064, and EPM7096 devices.
Macrocells
Macrocells
33 to 48
1 to 16
8 to 16
8 to 16
16
16
MAX 7000 Programmable Logic Device Family Data Sheet
36
36
PIA
Figure 1
36
36
16
8 to 16
16
8 to 16
Macrocells
Macrocells
shows the architecture of EPM7032,
17 to 32
49 to 64
LAB B
LAB D
8 to 16
8 to 16
Control
Control
Block
Block
I/O
I/O
8 to 16
I/O pins
8 to 16
I/O pins
7