EPM7512BFC256-7N Altera, EPM7512BFC256-7N Datasheet - Page 2

IC MAX 7000 CPLD 512 256-FBGA

EPM7512BFC256-7N

Manufacturer Part Number
EPM7512BFC256-7N
Description
IC MAX 7000 CPLD 512 256-FBGA
Manufacturer
Altera
Series
MAX® 7000Br
Datasheet

Specifications of EPM7512BFC256-7N

Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
2.375 V ~ 2.625 V
Number Of Logic Elements/blocks
32
Number Of Macrocells
512
Number Of Gates
10000
Number Of I /o
212
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-FBGA
Voltage
2.5V
Memory Type
EEPROM
Number Of Logic Elements/cells
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM7512BFC256-7N
Manufacturer:
Altera
Quantity:
10 000
MAX 7000B Programmable Logic Device Data Sheet
...and More
Features
2
System-level features
Advanced architecture features
Advanced package options
Advanced software support
MultiVolt
while I/O pins are compatible with 3.3-V, 2.5-V, and 1.8-V logic
levels
Programmable power-saving mode for 50% or greater power
reduction in each macrocell
Fast input setup times provided by a dedicated path from I/O
pin to macrocell registers
Support for advanced I/O standards, including SSTL-2 and
SSTL-3, and GTL+
Bus-hold option on I/O pins
PCI compatible
Bus-friendly architecture including programmable slew-rate
control
Open-drain output option
Programmable security bit for protection of proprietary designs
Built-in boundary-scan test circuitry compliant with
IEEE Std. 1149.1
Supports hot-socketing operation
Programmable ground pins
Programmable interconnect array (PIA) continuous routing
structure for fast, predictable performance
Configurable expander product-term distribution, allowing up
to 32 product terms per macrocell
Programmable macrocell registers with individual clear, preset,
clock, and clock enable controls
Two global clock signals with optional inversion
Programmable power-up states for macrocell registers
6 to 10 pin- or logic-driven output enable signals
Pin counts ranging from 44 to 256 in a variety of thin quad flat
pack (TQFP), plastic quad flat pack (PQFP), ball-grid array
(BGA), space-saving FineLine BGA
FineLine BGA, and plastic J-lead chip carrier (PLCC) packages
Pin-compatibility with other MAX 7000B devices in the same
package
Software design support and automatic place-and-route
provided by Altera’s MAX+PLUS
Windows-based PCs and Sun SPARCstation, and HP 9000
Series 700/800 workstations
TM
I/O interface enabling device core to run at 2.5 V,
®
TM
II development system for
, 0.8-mm Ultra
Altera Corporation

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