XC95144XL-7TQ100C Xilinx Inc, XC95144XL-7TQ100C Datasheet - Page 4

• Manufacturer Part Number: XC95144XL-7TQ100C
• Description: IC CPLD 144 MCELL 3.3V 100-TQFP
• Manufacturer: Xilinx Inc
• Series: XC9500XLr

Specifications of XC95144XL-7TQ100C

• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 3 V ~ 3.6 V
• Number Of Logic Elements/blocks: 8
• Number Of Macrocells: 144
• Number Of Gates: 3200
• Number Of I /o: 81
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Voltage: 3.3V
• Memory Type: FLASH
• Package: 100TQFP
• Family Name: XC9500XL
• Device System Gates: 3200
• Number Of Macro Cells: 144
• Maximum Propagation Delay Time: 7.5 ns
• Number Of User I/os: 81
• Number Of Logic Blocks/elements: 8
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 125 MHz
• Number Of Product Terms Per Macro: 90
• Dc: 0605
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Number Of Logic Elements/cells: -
• Other names: 122-1252; XC95144XL-7TQ100C

XC95144XL High Performance CPLD
Absolute Maximum Ratings
Recommended Operation Conditions
Quality and Reliability Characteristics
DC Characteristic Over Recommended Operating Conditions
4
Notes:
1.
2.
3.
Symbol
Symbol
Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easier to achieve. During transitions, the
device pins may undershoot to –2.0 V or overshoot to +7.0V, provided this over- or undershoot lasts less than 10 ns and with the
forcing current being limited to 200 mA. External I/O voltage may not exceed V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions
is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
For soldering guidelines and thermal considerations, see the
packages, see XAPP427.
V
Symbol
Symbol
V
V
I
I
V
V
OH
IH
T
OL
IL
T
N
V
CCINT
V
V
V
CCIO
V
V
ESD
STG
T
DR
PE
CC
TS
IN
IH
IL
O
J
Output high voltage for 3.3V outputs
Output high voltage for 2.5V outputs
Output low voltage for 3.3V outputs
Output low voltage for 2.5V outputs
Input leakage current
I/O high-Z leakage current
Data Retention
Program/Erase Cycles (Endurance)
Electrostatic Discharge (ESD)
Supply voltage relative to GND
Input voltage relative to GND
Voltage applied to 3-state output
Storage temperature (ambient)
Junction temperature
Supply voltage for internal logic
and input buffers
Supply voltage for output drivers for 3.3V operation
Supply voltage for output drivers for 2.5V operation
Low-level input voltage
High-level input voltage
Output voltage
Parameter
Parameter
(2)
Description
Parameter
(1)
(3)
(1)
www.xilinx.com
I
I
I
I
V
V
Commercial T
Industrial T
OH
OH
OL
OL
CC
CC
= 8.0 mA
= 500 μA
= –500 μA
= –4.0 mA
= Max; V
= Max; V
Device Packaging
Test Conditions
A
= –40
IN
IN
A
= 0
= GND or V
= GND or V
o
o
C to +85
C to 70
CCINT
information on the Xilinx website. For Pb-free
10,000
2,000
Min
20
by 4.0V.
o
CC
CC
C
o
C
–65 to +150
–0.5 to 4.0
–0.5 to 5.5
–0.5 to 5.5
Value
+150
Min
2.0
90% V
3.0
3.0
3.0
2.3
0
0
Max
Min
2.4
-
-
-
-
-
-
-
CCIO
DS056 (v2.0) April 3, 2007
V
Product Specification
Max
0.80
3.6
3.6
3.6
2.7
5.5
CCIO
Max
±10
±10
0.4
0.4
-
-
Units
Cycles
Years
Units
Volts
o
o
V
V
V
C
C
Units
Units
V
V
V
V
V
V
V
μA
μA
V
V
V
V
R