XC95144XL-5CSG144C Xilinx Inc, XC95144XL-5CSG144C Datasheet - Page 11
![no-image](/images/no-image-200.jpg)
XC95144XL-5CSG144C
Manufacturer Part Number
XC95144XL-5CSG144C
Description
IC CPLD 144MCELL 5NS 144-CSBGA
Manufacturer
Xilinx Inc
Series
XC9500XLr
Specifications of XC95144XL-5CSG144C
Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
5.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
8
Number Of Macrocells
144
Number Of Gates
3200
Number Of I /o
117
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Features
Automotive
Voltage
3.0 V ~ 3.6 V
Memory Type
CMOS
Package
144CSBGA
Family Name
XC9500XL
Device System Gates
3200
Maximum Propagation Delay Time
5 ns
Number Of User I/os
117
Number Of Logic Blocks/elements
8
Typical Operating Supply Voltage
3.3 V
Maximum Operating Frequency
178.6 MHz
Number Of Product Terms Per Macro
90
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC95144XL-5CSG144C
Manufacturer:
XILINX
Quantity:
95
Company:
Part Number:
XC95144XL-5CSG144C
Manufacturer:
Xilinx Inc
Quantity:
10 000
I/O Block
The I/O Block (IOB) interfaces between the internal logic
and the device user I/O pins. Each IOB includes an input
The input buffer is compatible with 5V CMOS, 5V TTL, 3.3V
CMOS, and 2.5V CMOS signals. The input buffer uses the
internal 3.3V voltage supply (V
input thresholds are constant and do not vary with the
DS054 (v2.5) May 22, 2009
Product Specification
Macrocell
(Inversion in
AND-array)
R
I/O/GTS1
I/O/GTS2
I/O/GTS3
I/O/GTS4
Product Term OE
To FastCONNECT
Switch Matrix
CCINT
Figure 10: I/O Block and Output Enable Capability
Global OE 4
Global OE 3
Global OE 1
Global OE 2
) to ensure that the
PTOE
OUT
www.xilinx.com
buffer, output driver, output enable selection multiplexer,
and user programmable ground control. See
details.
V
(50 mV typical) to help reduce system noise for input signals
with slow rise or fall edges.
XC9500XL High-Performance CPLD Family Data Sheet
CCIO
Macrocells
To other
voltage. Each input buffer provides input hysteresis
1
0
Available in XC95144XL
and XC95288XL
Slew Rate
Control
Programmable
Ground
User-
Bus-Hold
I/O Block
DS054_10_042101
I/O
Figure 10
for
11