EPM7032STC44-7N Altera, EPM7032STC44-7N Datasheet - Page 64
![IC MAX 7000 CPLD 32 44-TQFP](/photos/6/70/67053/544-44-tqfp_sml.jpg)
EPM7032STC44-7N
Manufacturer Part Number
EPM7032STC44-7N
Description
IC MAX 7000 CPLD 32 44-TQFP
Manufacturer
Altera
Series
MAX® 7000r
Datasheet
1.EPM7064STC44-10.pdf
(66 pages)
Specifications of EPM7032STC44-7N
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number Of Logic Elements/blocks
2
Number Of Macrocells
32
Number Of Gates
600
Number Of I /o
36
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Voltage
5V
Memory Type
EEPROM
Number Of Logic Elements/cells
2
Cpld Type
EEPROM
No. Of Macrocells
32
No. Of I/o's
36
Propagation Delay
7.5ns
Global Clock Setup Time
2.9ns
Frequency
175.4MHz
Supply Voltage Range
4.75V To 5.25V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
544-2005
EPM7032STC44-7N
EPM7032STC44-7N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM7032STC44-7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
MAX 7000 Programmable Logic Device Family Data Sheet
Revision
History
64
The information contained in the MAX 7000 Programmable Logic Device
Family Data Sheet version 6.7 supersedes information published in
previous versions. The following changes were made in the MAX 7000
Programmable Logic Device Family Data Sheet version 6.7:
Version 6.7
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.7:
■
Version 6.6
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.6:
■
■
Version 6.5
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.5:
■
Version 6.4
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.4:
■
Version 6.3
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.3:
■
Reference to AN 88: Using the Jam Language for ISP & ICR via an
Embedded Processor has been replaced by AN 122: Using Jam STAPL for
ISP & ICR via an Embedded Processor.
Added
Added
“Programming Times” section on page 18.
Updated text on
Added
Updated the
Only)” section on page
Tables 6
“Programming Sequence” section on page 17
Note (5)
“Open-Drain Output Option (MAX 7000S Devices
through 8.
on
page
page
16.
20.
28.
Altera Corporation
and