ADSP-2181KSZ-160 Analog Devices Inc, ADSP-2181KSZ-160 Datasheet - Page 22

• Manufacturer Part Number: ADSP-2181KSZ-160
• Description: IC DSP CONTROLLER 16BIT 128-PQFP
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-2181KSZ-160

• Interface: Synchronous Serial Port (SSP)
• Clock Rate: 40MHz
• Non-volatile Memory: External
• On-chip Ram: 80kB
• Voltage - I/o: 5.00V
• Voltage - Core: 5.00V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• No. Of Bits: 16
• Frequency: 40MHz
• Supply Voltage: 5V
• Embedded Interface Type: Host Port, Serial
• No. Of Mips: 40
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To
• Device Core Size: 16b
• Architecture: Enhanced Harvard
• Format: Fixed Point
• Clock Freq (max): 40MHz
• Mips: 40
• Device Input Clock Speed: 40MHz
• Ram Size: 32KB
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 128
• Package Type: MQFP
• Package: 128MQFP
• Numeric And Arithmetic Format: Fixed-Point
• Maximum Speed: 40 MHz
• Device Million Instructions Per Second: 40 MIPS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADSP-2181
Parameter
IDMA Write, Long Write Cycle
Timing Requirements:
t
t
t
Switching Characteristics:
t
t
NOTES
1
2
3
4
Start of Write = IS Low and IWR Low.
If Write Pulse ends before IACK Low, use specifications t
If Write Pulse ends after IACK Low, use specifications t
This is the earliest time for IACK Low from Start of Write. For IDMA Write cycle relationships, please refer to the User’s Manual.
IKW
IKSU
IKH
IKLW
IKHW
IACK Low before Start of Write
IAD15–0 Data Setup before IACK Low
IAD15–0 Data Hold after IACK Low
Start of Write to IACK Low
Start of Write to IACK High
IAD15–0
IACK
IWR
IS
Figure 16. IDMA Write, Long Write Cycle
IKSU
4
IDSU
t
, t
IKW
, t
1
IKH
IDH
.
.
2, 3
2, 3
t
IKHW
–22–
t
IKSU
t
IKLW
DATA
Min
0
0.5t
2
1.5t
CK
CK
+ 10
t
IKH
Max
15
Unit
ns
ns
ns
ns
ns
REV. D