ADSP-2185LKST-210 Analog Devices Inc, ADSP-2185LKST-210 Datasheet - Page 24

IC DSP CONTROLLER 16BIT 100LQFP

ADSP-2185LKST-210

Manufacturer Part Number
ADSP-2185LKST-210
Description
IC DSP CONTROLLER 16BIT 100LQFP
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr

Specifications of ADSP-2185LKST-210

Rohs Status
RoHS non-compliant
Interface
Host Interface, Serial Port
Clock Rate
52MHz
Non-volatile Memory
External
On-chip Ram
80kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Device Core Size
16b
Format
Fixed Point
Clock Freq (max)
52.5MHz
Mips
52.5
Device Input Clock Speed
52.5MHz
Ram Size
80KB
Program Memory Size
48KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-2185LKST-210
Manufacturer:
ANALOGDE
Quantity:
890
Part Number:
ADSP-2185LKST-210
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
Interrupts and Flags
Table 15. Interrupts and Flags
1
2
3
4
5
Parameter
Timing Requirements:
t
t
Switching Characteristics:
t
t
If IRQx and FI inputs meet t
Edge-sensitive interrupts require pulse widths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
IRQx = IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQLE.
PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.
Flag Outputs = PFx, FL0, FL1, FL2, FO.
IFS
IFH
FOH
FOD
following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the ADSP-218x DSP Hardware Reference for further information on
interrupt servicing.)
IRQx, FI, or PFx Setup Before CLKOUT Low
IRQx, FI, or PFx Hold After CLKOUT High
Flag Output Hold After CLKOUT Low
Flag Output Delay From CLKOUT Low
IFS
and t
IFH
setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on the
OUTPUTS
CLKOUT
FLAG
IRQx
PFx
FI
Rev. C | Page 24 of 48 | January 2008
5
5
Figure 17. Interrupts and Flags
1, 2, 3, 4
1, 2, 3, 4
t
FOH
t
FOD
t
IFH
t
IFS
Min
0.25t
0.25t
0.5t
CK
CK
CK
– 5
+ 15
Max
0.5t
CK
+ 4
Unit
ns
ns
ns
ns

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