ADSP-2196MBCA-140 Analog Devices Inc, ADSP-2196MBCA-140 Datasheet - Page 23

• Manufacturer Part Number: ADSP-2196MBCA-140
• Description: IC DSP CONTROLLER 16BIT 144MBGA
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-2196MBCA-140

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, SPI, SSP, UART
• Clock Rate: 140MHz
• Non-volatile Memory: ROM (48 kB)
• On-chip Ram: 40kB
• Voltage - I/o: 3.30V
• Voltage - Core: 2.50V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-MBGA, 144-Mini-BGA

ELECTRICAL CHARACTERISTICS
1
2
3
4
5
6
7
8
9
10
REV. PrA
Parameter
I
I
I
I
I
I
C
Specifications subject to change without notice.
Applies to output and bidirectional pins: DATA15–0, ADDR21–0, HAD15–0, MS3–0, IOMS, RD, WR, CLKOUT, HACK, PF7–0, TMR2–0, BGH,
BG, DT0, DT1, DT2/MISO0, TCLK0, TCLK1, TCLK2/SCK0, RCLK0, RCLK1, RCLK2/SCK1, TFS0, TFS1, TFS2/MOSI0, RFS0, RFS1,
RFS2/MOSI1, BMS, TDO, TXD, EMU.
Applies to input pins: ACK, BR, HCMS, HCIOMS, OPMODE, BMODE1–0, HA16, HALE, HRD, HWR, CLKIN, RESET, TCK, TDI, TMS, TRST,
DR0, DR1, BYPASS, RXD.
Applies to input pins with internal pull-ups: BMODE0, BMODE1, OPMODE, BYPASS, TCK, TMS, TDI, RESET.
Applies to input pin with internal pull-down: TRST
Applies to three-statable pins: DATA15–0, ADDR21–0, MS3–0, RD, WR, PF7–0, BMS, IOMS, TFSx, RFSx, TDO, EMU.
Test Conditions: @ V
Refer to
Applies to all signal pins.
September 2001
DD-PERIPHERAL1
DD-PERIPHERAL2
DD-POWERDOWN
DD-IDLE2
DD-TYPICAL
DD-PEAK
Guaranteed, but not tested.
IN
Table 23 on page 52
1
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
DDINT
Description
Supply Current (Core) Idle2
Supply Current (Core) Typical
Supply Current (Core) Peak
Supply Current (Peripheral)
Supply Current (Peripheral)
Supply Current
Input Capacitance
= 2.5V, T
for definitions of operation types.
For current information contact Analog Devices at 800/262-5643
AMB
= 25ºC
9, 10
(CONTINUED)
Test Conditions
PLL Enabled, HCLK
= 80 MHz, CCLK
Disabled
HCLK = 80 MHz,
CCLK = 160
MHz
HCLK = 80 MHz,
CCLK = 160
MHz
PLL Enabled, Core,
HCLK Disabled
HCLK = 80 MHz
PLL, Core, HCLK,
CLKIN Disabled
f
T
V
IN
IN
CASE
= 1 MHz,
= 2.5 V
7,8
7,8
= 25°C,
7
7
7
7
Min
Typical Max
1
184
215
5
60
100
ADSP-2196
TBD
Unit
mA
mA
mA
mA
mA
µA
pF
23