EP2C5Q208C8 Altera, EP2C5Q208C8 Datasheet - Page 86
![IC CYCLONE II FPGA 5K 208-PQFP](/photos/6/70/67062/544-208-pqfp_sml.jpg)
EP2C5Q208C8
Manufacturer Part Number
EP2C5Q208C8
Description
IC CYCLONE II FPGA 5K 208-PQFP
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C5Q208C8
Number Of Logic Elements/cells
4608
Number Of Labs/clbs
288
Total Ram Bits
119808
Number Of I /o
142
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Family Name
Cyclone® II
Number Of Logic Blocks/elements
4608
# I/os (max)
142
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
4608
Ram Bits
119808
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1448
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2C5Q208C8N
Manufacturer:
EPCOS
Quantity:
12 000
Company:
Part Number:
EP2C5Q208C8N
Manufacturer:
ALTERA
Quantity:
15
Company:
Part Number:
EP2C5Q208C8N
Manufacturer:
ALTERA74
Quantity:
619
Part Number:
EP2C5Q208C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Hot-Socketing Feature Implementation in Cyclone II Devices
Figure 4–1. Hot-Socketing Circuit Block Diagram for Cyclone II Devices
4–4
Cyclone II Device Handbook, Volume 1
Resistor
f
Pull-Up
Weak
PAD
The POR circuit monitors V
tri-stated until the device is in user mode. The weak pull-up resistor (R)
from the I/O pin to V
tolerance control circuit permits the I/O pins to be driven by 3.3 V before
V
driving out when the device is not in user mode.
For more information, see the DC Characteristics & Timing Specifications
chapter in Volume 1 of the Cyclone II Device Handbook for the value of the
internal weak pull-up resistors.
Figure 4–2
I/O buffers. This design ensures that the output buffers do not drive
when V
than V
socketing. The V
circuit capacitance.
R
CCIO
Output
and/or V
CCIO
CCIO
. This also applies for sudden voltage spikes during hot
shows a transistor level cross section of the Cyclone II device
is powered before V
CCINT
PAD
leakage current charges the voltage tolerance control
are powered, and it prevents the I/O pins from
CCIO
Input Buffer
to Logic Array
Tolerance
Voltage
Control
keeps the I/O pins from floating. The voltage
CCINT
CCINT
Output Enable
voltage level and keeps I/O pins
or if the I/O pad voltage is higher
Hot Socket
Pre-Driver
Output
Power-On
Monitor
Reset
Altera Corporation
February 2007