EP2C8F256C8N Altera, EP2C8F256C8N Datasheet - Page 74
![IC CYCLONE II FPGA 8K 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EP2C8F256C8N
Manufacturer Part Number
EP2C8F256C8N
Description
IC CYCLONE II FPGA 8K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C8F256C8N
Number Of Logic Elements/cells
8256
Number Of Labs/clbs
516
Total Ram Bits
165888
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
8256
# I/os (max)
182
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
8256
Ram Bits
165888
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1653
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2C8F256C8N
Manufacturer:
ALTBRA
Quantity:
77
Company:
Part Number:
EP2C8F256C8N
Manufacturer:
ALTERA
Quantity:
672
Part Number:
EP2C8F256C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2C8F256C8NK
Manufacturer:
st
Quantity:
2
Document Revision History
Document
Revision History
2–62
Cyclone II Device Handbook, Volume 1
February 2007
v3.1
November 2005
v2.1
July 2005 v2.0
February 2005
v1.2
November 2004
v1.1
June 2004 v1.0
Table 2–21. Document Revision History
Document
Version
Date &
●
●
●
●
●
●
●
●
●
●
●
●
●
●
Updated figure 2-12.
Updated
Added document to the Cyclone II Device Handbook.
Added document revision history.
Removed Table 2-1.
Updated
Added new
Added handpara note in
Updated
Updated
Updated
Updated Programmable Drive Strength table.
Updated
Updated
Updated
Updated technical content throughout.
Updated
Table
Table 2–21
Figure
Note (2)
Table
Figures 2–11
Table
Table
Table
Table
2–19.
Note (1)
2–7.
2–16.
2–18.
2–19.
2–16.
2–25.
to
Changes Made
Table
to
shows the revision history for this document.
Table
and 2–12.
“I/O Banks”
2–20.
2–17.
section.
●
●
Removed Drive Strength
Control from
Elaboration of DDR2 and
QDRII interfaces supported
by I/O bank included.
Summary of Changes
Altera Corporation
February 2007
Figure
2–25.