EP2C20F484I8 Altera, EP2C20F484I8 Datasheet - Page 48

• Manufacturer Part Number: EP2C20F484I8
• Description: IC CYCLONE II FPGA 20K 484-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C20F484I8

• Number Of Logic Elements/cells: 18752
• Number Of Labs/clbs: 1172
• Total Ram Bits: 239616
• Number Of I /o: 315
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 484-FBGA
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 18752
• # I/os (max): 315
• Frequency (max): 402.58MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 18752
• Ram Bits: 239616
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• For Use With: P0528 - BOARD DEV DE1 ALTERA544-1736 - CYCLONE II STARTER KIT EP2C20N
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-2104

Embedded Multipliers
Figure 2–19. Embedded Multiplier LAB Row Interface
2–36
Cyclone II Device Handbook, Volume 1
Interconect Region
LAB Block
C4 Interconnects
LAB
Embedded Multiplier
to LAB Row Interface
Block Interconnect Region
Direct Link Interconnect
from Adjacent LAB
16
Embedded Multiplier Routing Interface
The R4, C4, and direct link interconnects from adjacent LABs drive the
embedded multiplier row interface interconnect. The embedded
multipliers can communicate with LABs on either the left or right side
through these row resources or with LAB columns on either the right or
left with the column resources. Up to 16 direct link input connections to
the embedded multiplier are possible from the left adjacent LABs and
another 16 possible from the right adjacent LAB. Embedded multiplier
outputs can also connect to left and right LABs through 18 direct link
interconnects each.
array interface.
Row Interface
36
5
Block
36 Inputs per Row
Figure 2–19
R4 Interconnects
18
16
18
Control
[35..0]
Embedded Multiplier
shows the embedded multiplier to logic
36 Outputs per Row
[35..0]
18 Direct Link Outputs
to Adjacent LABs
36
C4 Interconnects
18
18
Altera Corporation
Interconect Region
Direct Link Interconnect
from Adjacent LAB
LAB Block
February 2007
LAB