EP2C35U484C6 Altera, EP2C35U484C6 Datasheet - Page 36

IC CYCLONE II FPGA 33K 484-UBGA

EP2C35U484C6

Manufacturer Part Number
EP2C35U484C6
Description
IC CYCLONE II FPGA 33K 484-UBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C35U484C6

Number Of Logic Elements/cells
33216
Number Of Labs/clbs
2076
Total Ram Bits
483840
Number Of I /o
322
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-UBGA
For Use With
P0301 - DE2 CALL FOR ACADEMIC PRICING544-1733 - PCI KIT W/CYCLONE II EP2C35N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-2112

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0
Global Clock Network & Phase-Locked Loops
Figure 2–15. LAB & I/O Clock Regions
2–24
Cyclone II Device Handbook, Volume 1
6
6
6
Cyclone Logic Array
LAB Row Clocks
LAB Row Clocks
LAB Row Clocks
labclk[5..0]
labclk[5..0]
labclk[5..0]
f
6
6
6
6
6
For more information on the global clock network and the clock control
block, see the PLLs in Cyclone II Devices chapter in Volume 1 of the
Cyclone II Device Handbook.
Column I/O Clock Region
Column I/O Clock Region
IO_CLK[5..0]
IO_CLK[5..0]
8 or 16
Global Clock
Network
6
6
6
LAB Row Clocks
LAB Row Clocks
LAB Row Clocks
labclk[5..0]
labclk[5..0]
labclk[5..0]
6
6
6
Altera Corporation
I/O Clock Regions
I/O Clock Regions
February 2007
Row I/O Clock
Region
IO_CLK[5..0]

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