EPF10K30RC240-3 Altera, EPF10K30RC240-3 Datasheet - Page 18

IC FLEX 10K FPGA 30K 240-RQFP

EPF10K30RC240-3

Manufacturer Part Number
EPF10K30RC240-3
Description
IC FLEX 10K FPGA 30K 240-RQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet

Specifications of EPF10K30RC240-3

Number Of Logic Elements/cells
1728
Number Of Labs/clbs
216
Total Ram Bits
12288
Number Of I /o
189
Number Of Gates
69000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-RQFP
Family Name
FLEX 10K
Number Of Usable Gates
30000
Number Of Logic Blocks/elements
1728
# Registers
738
# I/os (max)
189
Frequency (max)
125MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
5V
Logic Cells
1728
Ram Bits
12288
Device System Gates
69000
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
RQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2231

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18
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
LE Operating Modes
The FLEX 10K LE can operate in the following four modes:
Each of these modes uses LE resources differently. In each mode, seven
available inputs to the LE—the four data inputs from the LAB local
interconnect, the feedback from the programmable register, and the
carry-in and cascade-in from the previous LE—are directed to different
destinations to implement the desired logic function. Three inputs to the
LE provide clock, clear, and preset control for the register. The Altera
software, in conjunction with parameterized functions such as LPM and
DesignWare functions, automatically chooses the appropriate mode for
common functions such as counters, adders, and multipliers. If required,
the designer can also create special-purpose functions which use a specific
LE operating mode for optimal performance.
The architecture provides a synchronous clock enable to the register in all
four modes. The Altera software can set DATA1 to enable the register
synchronously, providing easy implementation of fully synchronous
designs.
Figure 9
Normal mode
Arithmetic mode
Up/down counter mode
Clearable counter mode
shows the LE operating modes.
Altera Corporation

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