EP3C120F780C8 Altera, EP3C120F780C8 Datasheet - Page 7
![IC CYCLONE III FPGA 119K 780FBGA](/photos/6/72/67270/544-780-fbga_sml.jpg)
EP3C120F780C8
Manufacturer Part Number
EP3C120F780C8
Description
IC CYCLONE III FPGA 119K 780FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
Specifications of EP3C120F780C8
Number Of Logic Elements/cells
119088
Number Of Labs/clbs
7443
Total Ram Bits
3981312
Number Of I /o
531
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2589 - KIT DEV EMB CYCLONE III EDITION544-2566 - KIT DEV DSP CYCLONE III EDITION544-2444 - KIT DEV CYCLONE III EP3C120544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-2391
544-2531
544-2531
EP3C120F780C8ES
544-2531
544-2531
EP3C120F780C8ES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C120F780C8
Manufacturer:
ALTERA
Quantity:
561
Company:
Part Number:
EP3C120F780C8N
Manufacturer:
ALTERA
Quantity:
642
Part Number:
EP3C120F780C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 1: Cyclone III Device Data Sheet
Electrical Characteristics
Table 1–5. Cyclone III Devices Bus Hold Parameter
© January 2010 Altera Corporation
Bus-hold
low,
sustaining
current
Bus-hold
high,
sustaining
current
Bus-hold
low,
overdrive
current
Bus-hold
high,
overdrive
current
Bus-hold trip
point
Note to
(1) The bus-hold trip points are based on calculated input voltages from the JEDEC standard.
Parameter
Table
1–5:
V
(maximum)
V
(minimum)
0 V < V
0 V < V
IN
IN
Condition
> V
< V
IL
IL
—
IN
IN
Bus Hold
Bus hold retains the last valid logic state after the source driving it either enters the
high impedance state or is removed. Each I/O pin has an option to enable bus hold in
user mode. Bus hold is always disabled in configuration mode.
Table 1–5
OCT Specifications
Table 1–6
and voltage.
Table 1–6. Cyclone III Devices Series OCT without Calibration Specifications
OCT calibration is automatically performed at device power-up for OCT enabled
I/Os.
Series OCT without
calibration
< V
< V
CC IO
CC IO
Description
Min
0.3
lists bus hold specifications for Cyclone III devices.
lists the variation of OCT without calibration across process, temperature,
–8
—
—
8
1.2
–125
Max
125
0.9
—
—
0.375 1.125 0.68
Min
–12
12
—
—
V
CCIO
1.5
3.0
2.5
1.8
1.5
1.2
(Note 1)
–175
(V)
Max
175
—
—
Min
–30
30
—
—
Commercial
1.8
Max
±30
±30
+40
+50
+50
–200
Max
1.07
200
V
—
—
CC IO
Resistance Tolerance
(V)
Min
–50
0.7
50
—
—
2.5
Industrial and Automotive
–300
Max
300
1.7
—
—
Cyclone III Device Handbook, Volume 2
Min
–70
0.8
70
—
—
Max
±40
±40
±50
±50
±50
3.0
–500
Max
500
—
—
2
Min
–70
0.8
70
—
—
3.3
–500
Max
500
—
—
2
Unit
%
%
%
%
%
1–7
Unit
μA
μA
μA
μA
V